运放基本仿真步骤

折叠式级联运放的仿真TheTypicalPerformanceofOp-AmpOpen-LoopDifferentialGain(AV)Common-modeRejectionRatio(CMRR)PowerSignalRejectionRatio(PSRR)PhaseMargin(PM)InputCommonModeRange(ICMR)OutputSwingRange(OSR)Input/OutputImpedance(CIN/ROUT)SlewRateNoiseTheSchematicofFoldedCascodeOp-AmpVPVNVOUTVPVNFoldedCascodeIBIAS=30nABIASVOUTVDD=5VVBIAS=1.2VVDDGND10/5M=110/5M=112/12M=112/12M=124/12M=148/12M=648/12M=248/12M=248/12M=448/12M=410/5M=110/5M=16/12M=16/12M=1InordertodeceasethepowerConsumption,IBIASisonly30nA.CreateSchematicandSymbolinSpectreTocreateasymbolofaschematic:FromDesign-CreateCellview-FromCellviewOpen-LoopDifferentialGainDCSweepVP-VN(largesignal)ACSweepVP-VNwithfixedfrequency(smallsignal)TwomethodsofsimulatingOpen-LoopDifferentialGainisavailableinADE(AnalogDesignEnvironment)Test-BenchofOpen-LoopDifferentialGain(method1)DCSweepVP-VN(largesignal)Inthismethod,VP=VCM_IN+x,andVN=VCM_IN-xWhere,VCM_INisthecommonvoltage,xisadesignvariables.SetupVNSetupVPADEofOpen-LoopDifferentialGain(method1)ToaddamodelforthesimulationFromADE-Setup-ModellibrariesTocreateaDCSweepFromADE-Analyses-Choose-DCWaveformofOpen-LoopDifferentialGain(method1)__2OUTCOMOUTOUTCOMOUTVPNVVVVAVVx_0|COMOUTOUTxVVWhere,DifferentialGainis71.56dBToobtainVCOM_OUTFromCalculator-SpecialFunctions-ValueVOUT-VCOM_OUTToobtainDCgainFromCalculator-SpecialFunctions-derivTest-BenchofOpen-LoopDifferentialGain(method2)ACSweepVP-VNwithfixedfrequencySetupVNSetupVPInthismethod,VP=VCM_IN+x+VAC,andVN=VCM_INWhere,VCM_INistheinputcommonvoltage,xisadesignvariables,VACisaACvoltageforACSweep.ADEofOpen-LoopDifferentialGain(method2)ToaddamodelforthesimulationFromADE-Setup-ModellibrariesTocreateaACSweepFromADE-Analyses-Choose-ACFixedFreqWaveformofOpen-LoopDifferentialGain(method2)1020logVOUTAVDifferentialGainis65.56dBTheresultsofthetwomethodsaredifferent,Infact,method1ismoreaccurateforDCgain.Common-modeRejectionRatioVPVNVOUTVcmVcm11COUTCcmVCVAVAVAAACMRRVCAACMRRYoucangetdetailillustrationfrom“CMOSAnalogCircuitDesign”,PhillipE.Allen,OxfordUniversityPress,Inc.Test-BenchofCMRR_NPcmCOMINACVVVVVWhere,VCOM_INistheinputcommonvoltage,VACisaACvoltageforACSweep.ADEofCMRRToaddamodelforthesimulationFromADE-Setup-ModellibrariesTocreateaACSweepFromADE-Analyses-Choose-ACWaveformofCMRR1/CMRRCMRRToobtainCMRR:FromCalculator-1/x1/CMRRandCMRRplotdirectly.WaveformofCMRRToobtainmagnitudePlotofCMRR:FromCalculator-dB20FrequencyresponseofCMRRTheCMRRis72.14dBatlowfrequencyrange.ToobtainphasePlotofCMRR:FromCalculator-phasePowerSignalRejectionRatioVPVNVOUTVDDVDCVAC1OUTDDVVPSRRYoucangetdetailillustrationfrom“CMOSAnalogCircuitDesign”,PhillipE.Allen,OxfordUniversityPress,Inc.Test-BenchofPSRRDDDCACVVVWhere,VACisaACvoltageforACSweep,andVDCisaDCvoltageADEofPSRRToaddamodelforthesimulationFromADE-Setup-ModellibrariesTocreateaACSweepFromADE-Analyses-Choose-ACWaveformofPSRR1/PSRRPSRRToobtainCMRR:FromCalculator-1/x1/PSRRandPSRRplotdirectly.WaveformofPSRRToobtainmagnitudePlotofPSRR:FromCalculator-dB20FrequencyresponseofPSRRTheCMRRis79.17dBatlowfrequencyrange.ToobtainphasePlotofPSRR:FromCalculator-phasePhaseMarginofOpen-loopfrequencyResponseVPVNVOUTVcm_inCLVcm_inVACWhere,VCM_INistheinputcommonvoltage,VACisaACvoltageforACSweep,AndCListheloadingcapacitor.Test-BenchofPMVCM_INVACThedominantpoleiscontrolledbyCLinfoldedCascodeopamp.ADEofPMToaddamodelforthesimulationFromADE-Setup-ModellibrariesTocreateaACSweepFromADE-Analyses-Choose-ACWaveformofPMToobtainmagnitudePlotofopen-loop:FromCalculator-dB20open-loopfrequencyresponseThePMis74owhenCLis5pf.ToobtainphasePlotofopen-loop:FromCalculator-phaseTherehavetwopolesinopen-loopfrequencyresponse,oneisthedominantpoleofoutputnet,andtheanotheristhemirrorpolecausedbyactivecurrentmirror.InputCommon-modeRangeVPVNVOUTCLVDC=xWhere,xisadesignvariablesandCListheloadingcapacitor.Test-BenchofICMRADEofICMRToaddamodelforthesimulationFromADE-Setup-ModellibrariesTocreateaDCSweepFromADE-Analyses-Choose-DCWaveformofICMRICMRTheinputcommon-moderangeis0~4.2VOutputSwingRangeVPVNVOUTVCM_IN+xVCM_IN-xWhere,VCM_INistheinputcommonvoltage,xisadesignvariables.ToobtainOSRTest-BenchofOSRDCSweepVP-VNInthismethod,VP=VCM_IN+x,andVN=VCM_IN-xWhere,VCM_INisthecommonvoltage,xisadesignvariables.SetupVNSetupVPADEofOSRToaddamodelforthesimulationFromADE-Setup-ModellibrariesTocreateaDCSweepFromADE-Analyses-Choose-DCWaveformofOSRYoucangettheleftwaveformfrompage8.OSRTheoutputswingrangeisfrom842.5mVto4.381V.PS:OSRisdependenceofapplicationsandisnotconstant.InputCapacitorVPVNVOUTVCM_INVACVCM_INIINWhere,VCM_INistheinputcommonvoltage,VACisACvoltageforACSweep.INININAcIICjVTest-BenchofCINVCM_INVACADEofCINToaddamodelforthesimulationFromADE-Setup-ModellibrariesTocreateaACSweepFromADE-Analyses-Choose-ACWaveformofCINTheinputcapacitorisapproximateof5pfOutputResistanceVPVNVOUTVIN=0V200RRIOUTROVOUTIOUTVPVNRidAV(VP-VN)RO200RROUTOUTOUTVRITheschematicofobtainingopen-loopoutputresistanceRO.TheequivalentmodelbyusingTheveninformOntheopamp.12001200200VOOUTOVARRRRA