半导体集成电路_03集成电路的基本制造工艺

半导体集成电路1.双极集成电路的基本工艺2.双极集成电路中元件结构2019/10/3pn+n-epin+P-Sin+-BLCBESP+P+双极集成电路的基本工艺2019/10/3P-SiTepiCBEpn+n-epin+P-SiP+P+Sn+-BLTepiAA’TBL-uptepi-oxxmcxjc四层三结结构的双极晶体管双极集成电路中元件结构2019/10/3ECB相关知识点隐埋层的作用、电隔离的概念、寄生晶体管MOS集成电路的工艺P阱CMOS工艺BiCMOS集成电路的工艺N阱CMOS工艺双阱CMOS工艺2019/10/3MOS晶体管的动作MOS晶体管实质上是一种使电流时而流过，时而切断的开关n+n+P型硅基板栅极（金属）绝缘层（SiO2）半导体基板漏极源极N沟MOS晶体管的基本结构源极(S)漏极(D)栅极(G)2019/10/3siliconsubstratesourcedraingateoxideoxidetopnitridemetalconnectiontosourcemetalconnectiontogatemetalconnectiontodrainpolysilicongatedopedsiliconfieldoxidegateoxideMOS晶体管的立体结构2019/10/3在硅衬底上制作MOS晶体管siliconsubstrate2019/10/3siliconsubstrateoxidefieldoxide2019/10/3siliconsubstrateoxidephotoresist2019/10/3ShadowonphotoresistphotoresistExposedareaofphotoresistChromeplatedglassmaskUltravioletLightsiliconsubstrateoxide2019/10/3非感光区域siliconsubstrate感光区域oxidephotoresist2019/10/3Shadowonphotoresistsiliconsubstrateoxidephotoresistphotoresist显影2019/10/3siliconsubstrateoxideoxidesiliconsubstratephotoresist腐蚀2019/10/3siliconsubstrateoxideoxidesiliconsubstratefieldoxide去胶2019/10/3siliconsubstrateoxideoxidegateoxidethinoxidelayer2019/10/3siliconsubstrateoxideoxidepolysilicongateoxide2019/10/3siliconsubstrateoxideoxidegategateultra-thingateoxidepolysilicongate2019/10/3siliconsubstrateoxideoxidegategatephotoresistScanningdirectionofionbeamimplantedionsinactiveregionoftransistorsImplantedionsinphotoresisttoberemovedduringresiststrip.sourcedrainionbeam2019/10/3siliconsubstrateoxideoxidegategatesourcedraindopedsilicon2019/10/3自对准工艺1.在有源区上覆盖一层薄氧化层2.淀积多晶硅，用多晶硅栅极版图刻蚀多晶硅3.以多晶硅栅极图形为掩膜板，刻蚀氧化膜4.离子注入2019/10/3siliconsubstratesourcedraingate2019/10/3siliconsubstrategatecontactholesdrainsource2019/10/3siliconsubstrategatecontactholesdrainsource2019/10/3完整的简单MOS晶体管结构siliconsubstratesourcedraingateoxideoxidetopnitridemetalconnectiontosourcemetalconnectiontogatemetalconnectiontodrainpolysilicongatedopedsiliconfieldoxidegateoxide2019/10/3CMOSFETP型sisubn+gateoxiden+gateoxideoxidep+p+2019/10/3VDDP阱工艺N阱工艺双阱工艺P-P+P+N+N+P+N+VSSVOUTVINVDDN-P+P+N+N+P+N+VSSVOUTVINVDDP-P+P+N+N+P+N+VSSVOUTVINN-SiP-SiN-I-SiN+-Si2019/10/3掩膜1：P阱光刻N-Si-衬底P-wellP-wellP-wellN+N+P+P+N+P+N-SiP2019/10/3具体步骤如下：1．生长二氧化硅（湿法氧化）：Si-衬底SiO2Si(固体)+2H2OSiO2（固体）+2H22019/10/32019/10/32．P阱光刻：涂胶腌膜对准曝光光源显影2019/10/32019/10/3硼掺杂（离子注入）刻蚀（等离子体刻蚀）去胶P+去除氧化膜P-well3．P阱掺杂：2019/10/32019/10/3离子源高压电源电流积分器离子束2019/10/3掩膜2：光刻有源区有源区：nMOS、PMOS晶体管形成的区域P+N+N+P+N-SiP-wellP-wellP-well♣淀积氮化硅光刻有源区场区氧化去除有源区氮化硅及二氧化硅SiO2隔离岛2019/10/3有源区depositednitridelayer有源区光刻板N型p型MOS制作区域(漏-栅-源)2019/10/3P-well1.淀积氮化硅：氧化膜生长（湿法氧化）P-well氮化膜生长P-well涂胶P-well对版曝光有源区光刻板2.光刻有源区：2019/10/3P-well显影P-well氮化硅刻蚀去胶3.场区氧化：P-well场区氧化（湿法氧化）P-well去除氮化硅薄膜及有源区SiO22019/10/3掩膜3：光刻多晶硅P-well去除氮化硅薄膜及有源区SiO2P-wellP+N+N+P+N-SiP-well栅极氧化膜多晶硅栅极♣生长栅极氧化膜淀积多晶硅光刻多晶硅2019/10/3P-well生长栅极氧化膜P-well淀积多晶硅P-well涂胶光刻多晶硅光刻板P-well多晶硅刻蚀2019/10/3掩膜4：P+区光刻1、P+区光刻2、离子注入B+，栅区有多晶硅做掩蔽，称为硅栅自对准工艺。3、去胶P-wellP+N+N+P+N-SiP-wellP-wellP+P+2019/10/3P-wellP+P-wellP+P+硼离子注入去胶2019/10/3掩膜5：N+区光刻1、N+区光刻2、离子注入P+，栅区有多晶硅做掩蔽，称为硅栅自对准工艺。3、去胶P-wellP+N+N+P+N-SiP-wellP-wellP+P+N+N+2019/10/3P-wellN+P-wellP+P+磷离子注入去胶P+P+N+N+2019/10/3掩膜6：光刻接触孔1、淀积PSG.2、光刻接触孔3、刻蚀接触孔P-wellP+N+N+P+N-SiP-wellP-wellP+P+N+N+磷硅玻璃（PSG)2019/10/3掩膜6：光刻接触孔P-wellP+P+N+N+淀积PSGP-wellP+P+N+N+光刻接触孔P-wellP+P+N+N+刻蚀接触孔P-wellP+P+N+N+去胶2019/10/32019/10/3掩膜7：光刻铝线1、淀积铝.2、光刻铝3、去胶P-wellP-wellP+P+N+N+2019/10/3P-wellP+P+N+N+铝线PSG场氧栅极氧化膜P+区P-wellN-型硅极板多晶硅N+区2019/10/3Example:Intel0.25micronProcess5metallayersTi/Al-Cu/Ti/TiNPolysilicondielectric2019/10/3InterconnectImpactonChip2019/10/3掩膜8：刻钝化孔CircuitPADCHIP双阱标准CMOS工艺P+p-epipwellnwellp+n+gateoxideAl(Cu)tungstenSiO2SiO2TiSi2fieldoxide•增加器件密度•防止寄生晶体管效应（闩锁效应）p-epiP阱n+STITiSi2STI深亚微米CMOS晶体管结构STISTISTIN阱n-n+n-p+p-p+p-源/漏扩展区浅槽隔离侧墙•多晶硅硅化物2019/10/3功耗驱动能力CMOS双极型Bi-CMOSBiCMOS集成电路工艺2019/10/3BiCMOS工艺分类以CMOS工艺为基础的BiCMOS工艺以双极工艺为基础的BiCMOS工艺。2019/10/3以P阱CMOS工艺为基础的BiCMOS工艺NPN晶体管电流增益小；集电极的串联电阻很大;NPN管C极只能接固定电位，从而限制了NPN管的使用2019/10/3以N阱CMOS工艺为基础的BiCMOS工艺BCEN+N+P+P+PMOSP-SUBNMOSN+N+PN阱N阱纵向NPN•NPN具有较薄的基区，提高了其性能；•N阱使得NPN管C极与衬底隔开，可根据电路需要接电位•集电极串联电阻还是太大，影响双极器件的驱动能力在现有N阱CMOS工艺上增加一块掩膜板2019/10/3BCEP+P+PMOSN+PN阱N阱纵向NPN-SUBP+N+N+NMOS-P－epiN+N+-BLN+-BL以N阱CMOS工艺为基础的改进BiCMOS工艺•使NPN管的集电极串联电阻减小56倍；•使CMOS器件的抗闩锁性能大大提高2019/10/3三、后部封装（在另外厂房）（1）背面减薄（2）切片（3）粘片（4）压焊：金丝球焊（5）切筋（6）整形（7）所封（8）沾锡：保证管脚的电学接触（9）老化（10）成测（11）打印、包装划片2019/10/3•金丝•劈•加热压焊2019/10/3三、后部封装（在另外厂房）2019/10/32019/10/3作业：1.课本P14，1.2题2.下图是NMOS晶体管的立体结构图，请标出各区域名称及掺杂类型，并画出这个器件的版图（包括接触孔和金属线）。3.名词解释：MOSNMOSPMOSCMOS场氧、有源区、硅栅自对准工艺