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上海交通大学硕士学位论文汽车电气动力及信号传送系统集成化设计的研究与开发姓名：周启申请学位级别：硕士专业：机械工程指导教师：马登哲;徐嘉明20030901-i--ii-,ABSTRACT-iii-Whetheranenterprisecansurviveinthemoreandmorecompetitivemarketdependsonquicklyrespondingtomarketdemand,shortingproductdesignperiod,andimprovingthetimetoreleasethequalifiedproduct.Atpresent,thedesignmethodofVehicleElectricalPower&SignalDistributionSubsystemislaggedbehindinChina.UsuallyengineersmanuallydraftSchematicsCircuitDiagrams,andthendrawHarnessAssemblyDrawingsandcreateEngineerBillofMaterialsforproductionafterharnessroutingdesignwithtapelineinvehiclemodelassembly.PrototypeworkersmakethesampleproductaccordingtorequirementsoftheHarnessAssemblyDrawings.FinallyengineerscarryouttheAssembleTestandPerformanceCheckinrealvehicle.Howeverifcaughtproblem,engineersneedtochangedesign,updatediagramandharnessassemblydrawings,reworksampleproduct,reassembleproduct,andretestperformanceinvehicle.Itwilltakeseveralandsometimedozenofengineeringchanges,untilfinalizethedesign.ABSTRACT-iv-Thereliealotofissuesinsuchkindoftraditionaldesignmethod,suchaslongtimetorelease,dependingoftherealsampletotestandassembly,reworkingagainandagain,wasteofmaterial,restrictionofregionwhichneedengineerdesignandtestinline,nocapabilityofsharingmathdatafromcustomersandsuppliers,notcommonproductdatamanagement,andisolationislandofdesignineachdepartmentsandeachphases.Themainaimofthisresearchisasfollowings:Accordingtothecontent,procedureandapplicationrequirementofdesignsystemofPower&SignalDistributionSubsystem,todevelopanintegrateddesignsystemwithallofthenecessarycomputertoolstosupportthecompletelifecycleofthevehicleelectricaldesignforPower&SignalDistributionSubsystemwhichincludes,schematicsdesign,electricalsimulatedanalysis,componentlibraryandselection,harnesspackaging&routingdesignandanalysis,andproductengineeringdrawing&billofmaterials.Therefore,toprovidevehicleelectricalengineergroupsanintegratedsystemandtooltoimprovethedevelopmentofvehicleelectricalsystems.Astheoutcomeofthisresearch,VehicleElectricalIntegratedDesignSystemisdesignedforVehicleElectricalPower&SignalDistributionSubsystem.Byadoptingthedigitalproductmodelandintegrateddesign,thesystemcanimprovethecapacityofproductdesignanddeveloping,shortentheABSTRACT-v-productdesignperiodandsubstantiallyimprovetheproductquality.netlist,passsynchronizesystem,virtualintegrationplatform,behavioralmodel,physicalmodel,propertyparameter.-1-1.11.1.1-2-1.1.212VehicleAssemblymathdataperspectiveview-3-1.2-4-1.3-5-1.41.4.11.4.21.4.3-6-1.4.41.4.51.4.6(EBOM)-7-1.5-8-2.1-9-2.22-1Integrationframeofsystemprocess•••••••/-10-––––SHERPADesignArchitectSaberUG-HarnessWEBMentorFrameWay2-2Integrationofsystemtools-11-2.3,2-3IntegrationofsystemdataCAD-12-CAD3.13.1.1PinDirTypePlocObjectNameObjectIDRev.FNAUPCConn_no31DomelightschematicmodelCAD-13-CAV_ID_CCAV_ID_CCONN_IDCONN_IDCAV_IDCAV_IDPINPINOBJECT_IDOBJECT_REVOBJECT_CODEOBJECT_CODE_INSTOBJECT_NAMEOBJECT_FUNC1OBJECT_FUNC2COMP_IDCOMP_REVUSAGECONN_COLOR_X1X1CONN_X132ABSABSswitchschematicmodelCAD-14-…3.1.2ColorCirc_noGaugeCableStrandsLengthUsage33WiremodelCAD-15-3.2ABSABS34CAD-16-3.33.3.136Powersubsystemschematicdiagram37AudiosubsystemschematicdiagramCAD-17-3.3.2(Netlist)(dpsys__001.hrn)ACBPIN_3PIN_2PIN_1PIN_1PIN_2PIN_3APIN_3ÞBPIN_2wire1infoAPIN_1ÞCPIN_2wire2infoBPIN_3ÞCPIN_1wire3infoAdevice1infoBdevice2infoCdevice3info38FirstpasssynchronizesystemCAD-18-CAD-19-3.3.3(dpsys__001.cmp)CAD-20--21-4.14.241VirtualPlatformofElectricalsystem-22-4.2.1postime/s2pon1poff3psleepposspeed/rpmpwr/Wtime/s3pmid1poff2plow4phighr/ohmt/srnompmc_trpftrfile:widerstand3.xcttrcname:resistorc_trpftrfile:widerstand3.xcttrcname:resistor424FortypesofFunctionModel-23-4.2.24.34.3.1-24-4.3.24.3.3-25-4.449Simulationvs.ExperimentofFuse-26--27-411ElectricalFunctionDesignofPowerWindowMotorCharacterization0.02.55.07.510.012.515.017.5N.m0.00.050.10.150.20.250.30.350.40.45(rpm)0.01000.02000.03000.04000.05000.0(0.0,0.45)(0.0,4091.0)(0.25,1477.2)(0.25,9.8375)(amps):N.mCurrent(rpm):N.mSpeedd=27.14227889084uN.m/rad/seckt=0.025839776960595N.m/ampke=0.027178468596028Volt/rad/seclaa=1mhenrysj=1mkgm^2ra=0.79243667012376ohmsAppliedVoltage=12voltsINPUTOUTPUT410PropertiesofAlternatormodel-28-412ElectricalCircuitDiagram41342V14VSimulationofwirecurrentunder42Vand14V41442V14VSimulationofwiretemperatureunder42Vand14V-29-4.541665kSimulatingAnalysisof65KWindowSpringBounceTest(C)415RealWirevs.SimulatedWire-30-4.6-31-5.15.25.2.15.2.2-32-5.2.35.2.45.2.55.2.65.2.75.3512DSimplifiedView-33-5.45.5523DSimplifiedView-34-5.5.15.5.25.5.3-35-5.5.45.5.55.5.653ProgramofTerminalSelection-36-5.5.754ProgramofConduitselection-37-55ProgramofCrimpselection-38-6.1:Unigraphics6.2dpsys.hrdpright.hrdpleft.hrdpbody.hrndpdash.hr61Netlistclassify-39-6.36.463MathdataofDoorHarnessCenterline-40-6.5643Dmathdataafterharnessrouting653DmathdataofInstrumentPanelHarness-41-6.66.6.16867-42-6.6.2696869-43-6.6.36106.76.7.1610Analsisreportofcomponents-44-6.7.2612612611InterferenceAnalysis-45-6.8613DiffharnDiffharnProgram-46-614DiffharnReport-47-6.9(EBOM)-48-(EBOM)7.1BOM