93LC56B中文资料

ª1997MicrochipTechnologyInc.PreliminaryDS21208A-page1M93LC56A/BFEATURES•Singlesupplywithoperationdownto2.5V•LowpowerCMOStechnology-1mAactivecurrent(typical)-1mAstandbycurrent(maximum)•256x8bitorganization(93LC56A)•128x16bitorganization(93LC56B)•Self-timedERASEandWRITEcycles(includingauto-erase)•AutomaticERALbeforeWRAL•Poweron/offdataprotectioncircuitry•Industrystandard3-wireserialinterface•DevicestatussignalduringERASE/WRITEcycles•SequentialREADfunction•1,000,000E/Wcyclesguaranteed•Dataretention200years•8-pinPDIP/SOICand8-pinTSSOPpackages•Availableforthefollowingtemperatureranges:BLOCKDIAGRAMDESCRIPTIONTheMicrochipTechnologyInc.93LC56A/Bare2K-bit,low-voltageserialElectricallyErasablePROMs.Thedevicememoryisconfiguredasx8(93LC56A)orx16bits(93LC56B).AdvancedCMOStechnologymakesthesedevicesidealforlowpowernonvolatilememoryapplications.The93LC56A/Bisavailableinstandard8-pinDIP,surfacemountSOIC,andTSSOPpackages.The93LC56AX/BXareonlyofferedina150-milSOICpackage.PACKAGETYPE-Commercial(C):0Cto+70C-Industrial(I):-40Cto+85CVccVssDICSCLKDOMEMORYARRAYADDRESSDECODERADDRESSCOUNTERDATAREGISTEROUTPUTBUFFERMODEDECODECLOCKGENERATORLOGIC93LC56A/BCSCLKDIDO12348765VccNCNCVssCSCLKDIDOVCCNCNCVss93LC56A/BNUVccCSCLKNCVssDODI93LC56A/BX93LC56A/BCSCLKDIDO12348765VccNCNCVssTSSOPSOICSOIC1234DIP8765123487652K2.5VMicrowireSerialEEPROMMicrowireisaregisteredtrademarkofNationalSemiconductor.93LC56A/BDS21208A-page2Preliminaryª1997MicrochipTechnologyInc.1.0ELECTRICALCHARACTERISTICS1.1MaximumRatings*VCC...................................................................................7.0VAllinputsandoutputsw.r.t.Vss................-0.6VtoVcc+1.0VStoragetemperature.....................................-65Cto+150CAmbienttemp.withpowerapplied.................-65Cto+125CSolderingtemperatureofleads(10seconds).............+300CESDprotectiononallpins................................................4kV*Notice:Stressesabovethoselistedunder“Maximumratings”maycausepermanentdamagetothedevice.Thisisastressratingonlyandfunctionaloperationofthedeviceatthoseoranyotherconditionsabovethoseindicatedintheoperationallistingsofthisspecificationisnotimplied.Exposuretomaximumratingconditionsforextendedperi-odsmayaffectdevicereliability.TABLE1-1PINFUNCTIONTABLENameFunctionCSChipSelectCLKSerialDataClockDISerialDataInputDOSerialDataOutputVSSGroundNCNoConnectVCCPowerSupplyTABLE1-2DCANDACELECTRICALCHARACTERISTICSAllparametersapplyoverthespecifiedoperatingrangesunlessotherwisenotedCommercial(C):VCC=+2.5Vto+6.0VTamb=0Cto+70CIndustrial(I):VCC=+2.5Vto+6.0VTamb=-40Cto+85CParameterSymbolMin.Max.UnitsConditionsHighlevelinputvoltageVIH12.0Vcc+1V2.7V£VCC£5.5V(Note2)VIH20.7VccVcc+1VVCC2.7VLowlevelinputvoltageVIL1-0.30.8VVCC2.7V(Note2)VIL2-0.30.2VccVVCC2.7VLowleveloutputvoltageVOL1—0.4VIOL=2.1mA;Vcc=4.5VVOL2—0.2VIOL=100mA;Vcc=VccMin.HighleveloutputvoltageVOH12.4—VIOH=-400mA;Vcc=4.5VVOH2Vcc-0.2—VIOH=-100mA;Vcc=VccMin.InputleakagecurrentILI-1010mAVIN=VSSOutputleakagecurrentILO-1010mAVOUT=VSSPincapacitance(allinputs/outputs)CIN,COUT—7pFVIN/VOUT=0V(Notes1&2)Tamb=+25C,Fclk=1MHzOperatingcurrentICCread—1500mAmAFCLK=2MHz;VCC=6.0VFCLK=1MHz;VCC=3.0VICCwrite—1.5mAStandbycurrentICCS—1mACS=VSSClockfrequencyFCLK—21MHzMHzVCC4.5VVCC4.5VClockhightimeTCKH250—nsClocklowtimeTCKL250—nsChipselectsetuptimeTCSS50—nsRelativetoCLKChipselectholdtimeTCSH0—nsRelativetoCLKChipselectlowtimeTCSL250—nsDatainputsetuptimeTDIS100—nsRelativetoCLKDatainputholdtimeTDIH100—nsRelativetoCLKDataoutputdelaytimeTPD—400nsCl=100pFDataoutputdisabletimeTCZ—100nsCl=100pF(Note2)StatusvalidtimeTSV—500nsCl=100pFProgramcycletimeTWC—6msERASE/WRITEmodeTEC—6msERALmodeTWL—15msWRALmodeEndurance—1M—cycles25C,VCC=5.0V,BlockMode(Note3)Note1:ThisparameteristestedatTamb=25CandFCLK=1MHz.2:Thisparameterisperiodicallysampledandnot100%tested.3:Thisapplicationisnottestedbutguaranteedbycharacterization.Forenduranceestimatesinaspecificapplication,pleaseconsulttheTotalEnduranceModelwhichmaybeobtainedonMicrochip’sBBSorwebsite.93LC56A/Bª1997MicrochipTechnologyInc.PreliminaryDS21208A-page32.0PINDESCRIPTION2.1ChipSelect(CS)Ahighlevelselectsthedevice;alowleveldeselectsthedeviceandforcesitintostandbymode.However,apro-grammingcyclewhichisalreadyinprogresswillbecompleted,regardlessoftheChipSelect(CS)inputsignal.IfCSisbroughtlowduringaprogramcycle,thedevicewillgointostandbymodeassoonasthepro-grammingcycleiscompleted.CSmustbelowfor250nsminimum(TCSL)betweenconsecutiveinstructions.IfCSislow,theinternalcon-trollogicisheldinaRESETstatus.2.2SerialClock(CLK)TheSerialClockisusedtosynchronizethecommuni-cationbetweenamasterdeviceandthe93LC56A/B.Opcode,address,anddatabitsareclockedinonthepositiveedgeofCLK.DatabitsarealsoclockedoutonthepositiveedgeofCLK.CLKcanbestoppedanywhereinthetransmissionsequence(athighorlowlevel)andcanbecontinuedanytimewithrespecttoclockhightime(TCKH)andclocklowtime(TCKL).Thisgivesthecontrollingmasterfreedominpreparingopcode,address,anddata.CLKisa“Don'tCare”ifCSislow(devicedeselected).IfCSishigh,butSTARTconditionhasnotbeendetected,anynum