高速多路数据采集与存储系统

Multi-ChannelHigh-speedDataAcquisitionandStorageSystemLIUWEN-YIZHANGYANElectronicmeasurementtechnologykeylaboratoryofchinaNorthUniversityofChinaTaiyuan030051,ChinaEmail:[e-mail]—BasedontheADS8365,FPGA,thisarticlegaveoutthedesignandimplementationprogramofsingle-chipmulti-channelsynchronousreal-timedataacquisitionstoragesystems.Theblockschematicdiagramofthehardwareinterfacecircuitandsomekeyprocedureshavebeenshown.ThedesigntakingXC2S100,ADS8365,CY7C68013asthecoredevices,usedprimarilyforcompletingthemeasurementandstoragemissioninavehicletestwhichincluded12roadvibration,4-wayshocks,4-waynoisesignal.Aftertheexternalanalogsignalfilteringandfollowingthrough,theFPGAcontrolADconvertingthemintodigital,andthenstoredintheFLASHmemory.Aftertheendofthetrial,datacanbereadbackthroughtheCY7C68013,andwecansplit,display,anddoprojectvolumeconversionprocessingsuchasoperation.Keywords-Acquisition;Storage;Read-back;FPGA;ADS8365;PhotoelectronicCouplerisolationI.INTRODUCTIONThehigh-speeddigitalsignalprocessingsystems,high-speedimageinformationconversion,voice,real-timeprocessingsystem,aswellasradar,communications,military,medicalandchemicalindustrysuchasareasoftenrequirednumberofanalogsignalstosynchronoussampling,sothatthedatacollectednotonlycontainsthesimulationsignalfrequencyrangeoffeatures,butalsomaintainthephasedifferencebetweendifferentanalogsignals.Theemergenceofthehigh-performancemulti-channelADCsynchronouschipmakessingle-chipmulti-channelADCtoreplacemulti-chipsingle-channelADCbecomepossible,Inthisstudy,micro-datamemorywillbeplacedinthevivowhichbemeasured,on-sitereal-timecompletetherapidacquisitionandstorageofinformation.Recoveryofmemory,thencomputershandlethedata,reproducethemeasuredinformationwhichcalledadynamictestingtechnology.Basedonsingle-chipmulti-channelADCchipADS8365,introduceahardwareandsoftwaredesignofameasurementandstoragesystemsthatincluded12roadvibration,4-wayshocks,4-waynoisesignalinitsvehicletest.Thissysteminstalledinthetank,workedontheprocessoftankexercising,withtheabilityofanti-poorenvironment,thedatabeenElectronicandcomputersciencetechnologyCollegeNorthUniversityofChinaTaiyuan030051,ChinaE-mail:[e-mail]inFLASHmemory,easyforthelong-termpreservationafterrecovery,whenthetrialended,canbereadbackthestoreddata,andcansplit,displaythemanddoprojectvolumeconversionprocessingsuchasoperation.II.SYSTEMFUNCTIONBRIEFINTRODUCTIONTheentiremeasurementsystemiscomposedoffourparts:thedatamemory,groundtestequipment,ground-basedcomputerandthecables.Thegroundcomputertoreadthestoreddata,thenanalyzeandtreatThegroundcomputerisself-developedtestinstrument;memoryiscomposedofthreeparts:acquisition,storageandpowermanagementmodule,itisresponsibleforreceiving,conditioning,quantization,decodingthroughtheinputinterface,andwritingtheframedataintothememory.Andthenbackthedatatocomputersforanalysis.Thepartoneacquisitionmoduleisresponsibleforthesignalacquisition,parttwomemorymanagementmoduleresponsiblefordatastorageandrecovery.Powermanagementmoduleconvertedtheelectricprovidedbythepowerinterfacetoavarietyofvoltage,andthenthesevoltagesupplytheentirememorysystem.Throughthisoptimizationleveldesign,systemsurvivabilitycanbegreatlyimproveandstronglyguaranteethesuccessofthepilot.III.ACQUISITIONANDSTORAGESYSTEMHARDWAREDESIGNA.AcquisitionModuleDesignWhenthesystembeenlaidonelectricity,thecentrallogiccontrolunitreceivestartsignalthroughthephotoelectricisolationmodule.Themoduleinterfaceisanunchargednormallyopencontact.Oncethecentrallogiccontrolunitdetectedthattheinterfacehavechangedfromalwaysopentonormallyclosed,startedacquisitionstoragesystem.Inordertopreventmiscarriageofjusticeforthestartsignal,wemustdodataprocessingtoeliminateshakingwithinthecentrallogiccontrolunit,thetimetodetectthepulsewideis500ms.Atthesametime,toensuretheequipmentwillnotre-recordingdataduetowrongoperationafteritfelltotheground,ledtocoverageofthetestdatahasbeenstored,afterthecentrallogiccontrolunitdetectedthatstartsignaliseffective,willlockthesystemthroughself-SupportedbyChinaNationalScienceFoundation（NO。50424507）978-1-4244-3693-4/09/$25.00©2009IEEElockingsystemmodule.Toensurethatthecourseoftheirworkwillnotstoprecordingdatauntilthestoragespacefullorsystempower-off.Whenthesystemisactivated,themulti-channelanalogsignalresultingfromthetestingUnits,throughfilteringandtracing,themulti-channelanalogsignalthatkepthighsamplingraterequirementsdirectlytransmittedtotheADCs.Whileotherssignalselectedbythemultiplexeranalogswitch,thentransmittedtotheADCs.Variousanalogsignalanalog-digitalconversioniscontrolledbyFPGA,andthenthedatabeensenttosomeFPGAI/OportsofthememoryboardthroughtheFPGAinternalFIFOoftheacquisitionboard.Inaddition,iftheacquisitionboardsuddenlysufferpowerfailuresituationwhenitisworking,thecentrallogiccontrolunitwillimmediatelystopworking,willnotaffectthedatastoredinthememory.ThedesigndiagramasFigure1:AnalogFilterMulti-channelParallelsignalsfollowsignalandAnalogswitchADCDataDigitalRS485FPGAControlExternalisolationCouplerPhotoelectronicManualDataBuffe