等精度频率计

2013-2014学年第2学期数字系统设计实践(课号:103D47A)实验报告实验名称：等精度频率计学院信息科学与工程学院班级电气自动化2班组别A20成员罗静娜、陈壮豪姓名陈壮豪学号136450031指导教师李宏完成时间2015年6月8日星期四目录一、实验任务与要求....................................................................................................31.1测量信号：方波；.........................................................................................................31.2幅值：TTL电平；..........................................................................................................31.3频率：100HZ~10MHZ；...................................................................................................31.4测量误差小于0.1%；....................................................................................................31.5闸门信号：~0.1s；响应时间：~1s.............................................................................3二、实验设计................................................................................................................32.1电路模型：......................................................................................................................32.2等精度频率计设计原理..................................................................................................42.2等精度频率计设计思路及其参数选择:.........................................................................53.1闸门信号产生模块：......................................................................................................63.2寄存器模块：..................................................................................................................73.3频率显示切换模块：......................................................................................................83.4频率的计算：..................................................................................................................93.5频率显示前的数据处理模块：....................................................................................103.6顶层电路图：................................................................................................................113.7管脚分配图：................................................................................................................12四、实验结果..............................................................................................................134.1数据记录：....................................................................................................................134.2实验结果分析：............................................................................................................13一、实验任务与要求1.1测量信号：方波；1.2幅值：TTL电平；1.3频率：100HZ~10MHZ；1.4测量误差小于0.1%；1.5闸门信号：~0.1s；响应时间：~1s二、实验设计2.1电路模型：2.2等精度频率计设计原理1．频率计算：2．测量误差计算:考虑No最大误差为：1，则与被测频率无关，故也称：等精度频率测量方法2.2等精度频率计设计思路及其参数选择:系统时钟频率选择50khz；测量频率范围为100HZ至10MHZ；闸门信号约为0.1s，最长响应时间约为1s，测量误差为1/（500000）0.1%。满足设计要求。输出频率的整数部分和小数显示通过按钮来切换。其中最大时为8位整数，3位小数。3.1闸门信号产生模块：libraryieee;useieee.std_logic_1164.all;useieee.std_logic_arith.all;useieee.std_logic_unsigned.all;entityKeyisport(cp:instd_logic;output:outstd_logic);endKey;architecturedataofKeyissignaliq:unsigned(12downto0);signaliq1:std_logic;beginprocess(cp,iq,iq1)beginif(cp'eventandcp='1')thenif(iq=4999)theniq1=notiq1;iq=('0','0','0','0','0','0','0','0','0','0','0','0','0');elseiq=iq+1;endif;endif;output=iq1;endprocess;enddata;3.2寄存器模块：libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entitysaveisport(clk:instd_logic;intt:instd_logic_vector(19downto0);outt:outstd_logic_vector(19downto0));endsave;architectureaofsaveissignaltemp:std_logic_vector(19downto0);beginprocess(clk,intt)beginif(clk'eventandclk='1')thentemp=intt;endif;outt=temp;endprocess;enda;3.3频率显示切换模块：libraryieee;useieee.std_logic_1164.all;useieee.std_logic_arith.all;useieee.std_logic_unsigned.all;entitySeleteisport(input1:instd_logic_vector(3downto0);input2:instd_logic_vector(3downto0);input3:instd_logic_vector(3downto0);input4:instd_logic_vector(3downto0);input5:instd_logic_vector(3downto0);input6:instd_logic_vector(3downto0);input7:instd_logic_vector(3downto0);input8:instd_logic_vector(3downto0);input9:instd_logic_vector(3downto0);input10:instd_logic_vector(3downto0);input11:instd_logic_vector(3downto0);selete:instd_logic;date:outstd_logic_vector(31downto0));endSelete;architecturedataofSeleteissignaliq1:std_logic_vector(31downto0);signaliq2:std_logic_vector(31downto0);beginprocess(input1,input2,input3,input4,input5,input6,input7,input8,input9,input10,input11)beginiq1=input11(3downto0)&input10(3downto0)&input9(3downto0)&input8(3downto0)&input7(3downto0)&input6(3downto0)&input5(3downto0)&input4(3downto0);iq2=00000000000000000000&input3(3downto0)&input2(3downto0)&input1(3downto0);caseseleteiswhen'0'=date=iq1;when'1'=date=iq2;endcase;endprocess;enddata;3.4频率的计算：利用公式：把求出的fx扩大1000倍，即把小数点后三位放入整数部分。3.5频率显示前的数据处理模块：将频率的各个位上的数字分出来，用过选择模块选择输出位3.6等精度频率计核心原理模块通过D触发器，对输出的闸门信号进行同步，在同步后的闸门信号下给两个频率分别计数，得到对应的计数值用于计算频率并显示。3.6顶层电路图：3.7管脚分配图：四、实验结果4.1数据记录：函数信号发生器：数码管显示数据：误差（%）：100.000100.0000.00%335.000334.9750.01%654.500654.5000.00%1000.0001000.0000.00%3250.6603250.4010.01%6555.5006555.0660.01%10000.00010000.0000.00%45550.00045550.1090.00