江璐EDA实验四

1一、系统设计说明1、波形发生器的系统结构图2、设计说明（1）系统工作原理顶层文件SINGT.vhd在FPGA中实现，包含两个部分：波形发生器控制模块，即ROM的地址信号发生器，由6为计数器担任；六位计数器产生一个六位宽的地址，每个地址对应一个波形数据，六位对应64个波形数据，每个地址的发生即调用一个波形数据。地址发生器的时钟CLK的输入频率f0与每周期的波形数据点数，以及D/A输出频率f的关系是：f＝f0/6。两部分模块组合完成8位波形数据输出，经过数模转换，转换模拟的信号，然后在示波器上显示。（2）波形发生器控制模块6位二进制计数器（即64进制计数器）为地址发生器，产生地址数据，并输送到ROM相应的地址信号输入端，控制ROM的正弦波数据输出。（3）波形数据存储模块（ROM）波形数据存储模块ROM用于存储正弦波数据，每个数据都有对应的地址数据，从而当ROM接收到来自地址发生器的地址数据时，就输出相应地址的正弦波数据（正弦波数据由8位的二进制数表示）。当64个正弦波数据全部输出时为一个周期结束，从而返回初始状态从新计数输出正弦数据。二、实验记录1、电路原理图22、顶层文件的程序3、ROM元件--megafunctionwizard:%ROM:1-PORT%--GENERATION:STANDARD--VERSION:WM1.0--MODULE:altsyncram--============================================================--FileName:ROM78.vhd--MegafunctionName(s):--altsyncram----SimulationLibraryFiles(s):--altera_mf3--============================================================--************************************************************--THISISAWIZARD-GENERATEDFILE.DONOTEDITTHISFILE!----7.2Build15109/26/2007SJWebEdition--************************************************************--Copyright(C)1991-2007AlteraCorporation--YouruseofAlteraCorporation'sdesigntools,logicfunctions--andothersoftwareandtools,anditsAMPPpartnerlogic--functions,andanyoutputfilesfromanyoftheforegoing--(includingdeviceprogrammingorsimulationfiles),andany--associateddocumentationorinformationareexpresslysubject--tothetermsandconditionsoftheAlteraProgramLicense--SubscriptionAgreement,AlteraMegaCoreFunctionLicense--Agreement,orotherapplicablelicenseagreement,including,--withoutlimitation,thatyouruseisforthesolepurposeof--programminglogicdevicesmanufacturedbyAlteraandsoldby--Alteraoritsauthorizeddistributors.Pleaserefertothe--applicableagreementforfurtherdetails.LIBRARYieee;USEieee.std_logic_1164.all;LIBRARYaltera_mf;USEaltera_mf.all;ENTITYROM78ISPORT(address:INSTD_LOGIC_VECTOR(5DOWNTO0);inclock:INSTD_LOGIC;q:OUTSTD_LOGIC_VECTOR(7DOWNTO0));ENDROM78;ARCHITECTURESYNOFrom78ISSIGNALsub_wire0:STD_LOGIC_VECTOR(7DOWNTO0);COMPONENTaltsyncramGENERIC(clock_enable_input_a:STRING;clock_enable_output_a:STRING;init_file:STRING;intended_device_family:STRING;lpm_hint:STRING;lpm_type:STRING;numwords_a:NATURAL;operation_mode:STRING;outdata_aclr_a:STRING;outdata_reg_a:STRING;widthad_a:NATURAL;4width_a:NATURAL;width_byteena_a:NATURAL);PORT(clock0:INSTD_LOGIC;address_a:INSTD_LOGIC_VECTOR(5DOWNTO0);q_a:OUTSTD_LOGIC_VECTOR(7DOWNTO0));ENDCOMPONENT;BEGINq=sub_wire0(7DOWNTO0);altsyncram_component:altsyncramGENERICMAP(clock_enable_input_a=BYPASS,clock_enable_output_a=BYPASS,init_file=romd.mif,intended_device_family=CycloneII,lpm_hint=ENABLE_RUNTIME_MOD=YES,INSTANCE_NAME=NONE,lpm_type=altsyncram,numwords_a=64,operation_mode=ROM,outdata_aclr_a=NONE,outdata_reg_a=UNREGISTERED,widthad_a=6,width_a=8,width_byteena_a=1)PORTMAP(clock0=inclock,address_a=address,q_a=sub_wire0);ENDSYN;--============================================================--CNXfileretrievalinfo--============================================================--Retrievalinfo:PRIVATE:ADDRESSSTALL_ANUMERIC0--Retrievalinfo:PRIVATE:AclrAddrNUMERIC0--Retrievalinfo:PRIVATE:AclrByteNUMERIC0--Retrievalinfo:PRIVATE:AclrOutputNUMERIC1--Retrievalinfo:PRIVATE:BYTE_ENABLENUMERIC0--Retrievalinfo:PRIVATE:BYTE_SIZENUMERIC8--Retrievalinfo:PRIVATE:BlankMemoryNUMERIC0--Retrievalinfo:PRIVATE:CLOCK_ENABLE_INPUT_ANUMERIC0--Retrievalinfo:PRIVATE:CLOCK_ENABLE_OUTPUT_ANUMERIC0--Retrievalinfo:PRIVATE:ClkenNUMERIC0--Retrievalinfo:PRIVATE:IMPLEMENT_IN_LESNUMERIC0--Retrievalinfo:PRIVATE:INIT_FILE_LAYOUTSTRINGPORT_A--Retrievalinfo:PRIVATE:INIT_TO_SIM_XNUMERIC05--Retrievalinfo:PRIVATE:INTENDED_DEVICE_FAMILYSTRINGCycloneII--Retrievalinfo:PRIVATE:JTAG_ENABLEDNUMERIC1--Retrievalinfo:PRIVATE:JTAG_IDSTRINGNONE--Retrievalinfo:PRIVATE:MAXIMUM_DEPTHNUMERIC0--Retrievalinfo:PRIVATE:MIFfilenameSTRINGromd.mif--Retrievalinfo:PRIVATE:NUMWORDS_ANUMERIC64--Retrievalinfo:PRIVATE:RAM_BLOCK_TYPENUMERIC0--Retrievalinfo:PRIVATE:RegAddrNUMERIC1--Retrievalinfo:PRIVATE:RegOutputNUMERIC0--Retrievalinfo:PRIVATE:SYNTH_WRAPPER_GEN_POSTFIXSTRING0--Retrievalinfo:PRIVATE:SingleClockNUMERIC0--Retrievalinfo:PRIVATE:UseDQRAMNUMERIC0--Retrievalinfo:PRIVATE:WidthAddrNUMERIC6--Retrievalinfo:PRIVATE:WidthDataNUMERIC8--Retrievalinfo:PRIVATE:rdenNUMERIC0--Retrievalinfo:CONSTANT:CLOCK_ENABLE_INPUT_ASTRINGBYPASS--Retrievalinfo:CONSTANT:CLOCK_ENABLE_OUTPUT_ASTRINGBYPASS--Retrievalinfo:CONSTANT:INIT_FILESTRINGromd.mif--Retrievalinfo:CONSTANT:INTENDED_DEVICE_FAMILYSTRINGCycloneII--Retrievalinfo:CONSTANT:LPM_HINTSTRINGENABLE_RUNTIME_MOD=YES,INSTANCE_NAME=NONE--Retrievalinfo:CONSTANT:LPM_TYPESTRINGaltsyncram--Retrievalinfo:CONSTANT:NUMWORDS_ANUMERIC64--Retrievalinfo:CONSTANT:OPERATION_MODESTRINGROM--Retrievalinfo:CONSTANT:OUTDATA_ACLR_ASTRINGNONE--Retrievalinfo:CONSTANT:OUTDATA_REG_ASTRINGUNREGISTERED--Retrievalinfo:CONSTANT:WIDTHAD_ANUMERIC6--Retrievalinfo:CONSTANT:WIDTH_ANUMERIC8--Retrievalinfo:CONSTANT:WIDTH_BYTEENA_ANUMERIC1--Retrievalinfo:USED_PORT:address0060INPUTNODEFVALaddress[5..0]--Retrievalinfo:USED_PORT:inclock0000INPUTNODEFVALinclo