基于DSP的音频信号处理

基于DSP的音频信号采集和处理设计课题背景实现方案硬件系统软件系统结束附：原理图、主程序流程图声反馈现象声反馈，是扩声系统中的一种常见现象由声反馈引起的啸叫限制了系统扩声增益的提高，使声音产生失真，严重时甚至使系统无法正常工作。传统的声反馈抑制方法，包括改善房间声学环境、在系统中串联均衡器或移频器等。但这些方法操作不便，而且对音质损伤大。自适应滤波器方案其基本原理是根据给定输入和对应的期望输出，按照NLMS算法不断修正自适应滤波器系数，最终利用自适应滤波器合成回声。从受到干扰的声音（回声+原声）中减去该合成的回声，即可得到原声，从而抑制了回声。NLMS算法10)()()()()(21NkknxnenxkhkhnnMnknxkhnyNk,,1,0)()()(10Mnnyndne,1,0)()()(10)()()()(1Nkknxnekhkhnn硬件系统组成电源模块时钟模块复位模块JTAG接口AD模块存储器模块控制模块DSP芯片LED指示模块抗混叠模块DA模块音箱麦克功率放大通信模块时钟电路的设计CLKMD1CLKMD2CLKMD3CLKMD的复位值时钟方式000E007HPLL*150019007HPLL*100104007HPLL*50111007HPLL*2100F007HPLL*11010000H二分频110F000H四分频111#####保留TS1GND2OUT3VCC4EPSON8.192MHZDGND+3.3VL2HZ0805E601R0.1uFC43DGND33.2R401%MCLKN值采样率N值采样率08Khz416Khz164Khz512.8Khz232Khz610.667Khz321.33khz79.143Khz复位电路的设计S1WDI+5VMR123U1_andASN74LVC08ADMR1VCC2GND3PFI4PFO5WDI6RST7WDO8MAX706SCSAGPIO(BDX1)RESET1.6s定时，复位脉宽200ms电源电路的设计VinVoutGNDVR2AMS1117-3.3VinVoutGNDVR3AMS1117-1.8104C52104C53104C5410uFC5610uFC5710uFC58VinVoutGND7805780512POWER_INHeader2电源模块Vin104C5110mHL1Inductor5VA+5V+3.3V+1.8VDS31KR50123sw-vccsw-vcc主处理器和AD设计麦克接口抗混叠滤波（低通滤波器）TLC320AD50A/DD/A功率放大音响接口DSP处理器McBSP与AD50串行通信接口存储器扩展电路设计片外flash存储器扩展及片选逻辑DSPSMSTRBP_CED_CER/WOE片选逻辑12U1_nonASN74LVC04AD123U1_orASN74LVC32AD456U1_orBadss0adss1adss2adss3adss4adss5adss6adss7adss8adss9adss10adss11adss12adss13adss14adss15adss16adss17data0data1data2data3data4data5data6data7data8data9data10data11data12data13data14data15+3.3VDGND0.1uFCb110KRa1+3.3VDGNDISOER/WRSFlashA151A142A133A124A115CE26VCC37VSS27WE11A106A97A820A718NC313NC516A619A520A421A322A1717A1648VSS46BYTE47RESET12OE28A223A124A025DQ15/A-145DQ1443DQ1341DQ1239DQ1136DQ1034DQ932DQ830DQ744DQ642DQ540DQ438DQ335DQ233DQ131DQ029RY/BY15NC19NC210NC414FLASHAM29LV400B抗混叠滤波电路AGND5.11KR11KR210uFC1AGND5VA1uFC220KR3200KR520KR45VAAGND200pFC3200KR6VMID_AUDIO200KR851.1KR7200pFC4VMID_AUDIO0.1uFC50.001uFC70.1uFC6INM2INP213284TLC2272CDA567TLC2272CDB35421ST-3150-5N软件系统设计与实现初始化TMS320VC5402MCBSPTLC320AD50调用自适应滤波器，抑制回声调用自适应滤波算法（NLMS）,调整滤波器参数存储自适应滤波器参数Bootlaoder在线加载工作状态指示软件功能框图音频采样及转换硬件系统原理图AGND5.11KR11KR210uFC1AGND5VA1uFC220KR3200KR520KR45VAAGND200pFC3200KR6200KR851.1KR7200pFC4VMID_AUDIO0.1uFC50.001uFC70.1uFC610KR2110KR2210KR231uFC220.1uFC215VAAGNDGAIN1INPUT-2INPUT+3GND4VOUT5VS6BYPASS7GAIN8LM38620KR310.1uFC31AGNDAGND10uFC321KR32AGNDAGND5VA0.1uFC330.047uFC3520KR33330uFC34AGND321JP3TSW-103-07-G-SSPEAKER_OUTINM2INP2OUTP213284TLC2272CDA567TLC2272CDB封装35421ST-3150-5NST-3120-5B原35421ST-3150-5N_outAGND22pFC4222pFC4112Y120MHzX1X2时钟模块S1VinVoutGNDVR2AMS1117-3.3VinVoutGNDVR3AMS1117-1.8104C52104C53104C5410uFC5610uFC5710uFC58VinVoutGND78057805VinDGNDGND4DATA22DATA13VCC1USB1USB-B12POWER_INHeader2TMS1TRST2TDI3GND4VCC5NC6TDO7GND8TRET9GND10TCK11GND12EM013EMI14JTAG_DSP+1.8V+3.3Vdata0data1data2data3data4data5data6data7data8data9data10data11data12data13data14data15adss0adss1adss2adss3adss4adss5adss6adss7adss8adss9adss10adss11adss12adss13adss14adss15PSDSR/WINT0A16XFA17X2X1RSEMU1EMU0TRSTTMSTDOTDITCK主处理器模块DSP_OUTDSP_INTMSTDIEMU0TRSTTDOTCKEMU1+3.3VDGNDJTAG_DSP10KR6110KR62+3.3V0.01uFC710.01uFC720.01uFC730.01uFC740.01uFC750.01uFC760.01uFC810.01uFC820.01uFC830.01uFC840.01uFC850.01uFC8610uFC7710uFC87+3.3V+1.8VDGNDDGND电源模块Vin去耦电容0.1uFC910.1uFC920.1uFC940.1uFC93AGNDDGND0.1uFC95+5V+3.3V100R910.1uFC96AGNDOUTP2100R92100R93AGNDINP2INM2SCLKSCLKMCLKFSFS10KR9410KR95+3.3V100R96DGNDDSP_INDSP_OUTBIOBIOA151A142A133A124A115CE6I/O07I/O18I/O29I/O310VDD11GND12I/O413I/O514I/O615I/O716WE17A1018A919A820A721NC22NC23A624A525A426A327NC28I/O829I/O930I/O1031I/O1132VDD33GND34I/O1235I/O1336I/O1437I/O1538LB39UB40OE41A242A143A044U1_RAM_PIS61LV6416A151A142A133A124A115CE6I/O07I/O18I/O29I/O310VDD11GND12I/O413I/O514I/O615I/O716WE17A1018A919A820A721NC22NC23A624A525A426A327NC28I/O829I/O930I/O1031I/O1132VDD33GND34I/O1235I/O1336I/O1437I/O1538LB39UB40OE41A242A143A044U1_RAM_DIS61LV6416data0data1data2data3data4data5data6data7data8data9data10data11data12data13data14data15data0data1data2data3data4data5data6data7data8data9data10data11data12data13data14data15+3.3V+3.3Vadss0adss1adss2adss3adss4adss5adss6adss7adss8adss9adss10adss11adss12adss13adss14adss15adss0adss1adss2adss3adss4adss5adss6adss7adss8adss9adss10adss11adss12adss13adss14adss15DGNDDGNDP_CED_CER/WR/W存储器扩展adss0adss1adss2adss3adss4adss5adss6adss7adss8adss9adss10adss11adss12adss13adss14adss15adss16adss17data0data1data2data3data4data5data6data7data8data9data10data11data12data13data14data15DGND0.1uFCa1DGND0.1uFCa2+3.3VDGND0.1uFCb110KRa1+3.3VDGNDIS程存数存DSPSMSTRBIOSTRBMSTRBP_CED_CER/WOEOER/WOEOE+3.3V1KR721KR731KR74READYHOLDINT1INT2INT3NMIINT0INT1INT2INT3NMI1KR761KR771KR78+3.3VREADYMP/MCMP/MCCLKMD1CLKMD2CLKMD3DGND部分闲置引脚设置&时钟工作模式选择Vss57D1100A19109D2101A18108D4103D6113D10117D9116D5104A17107D3102D099D7114Vss106Vss70Vss50Vss76Vss93Vss40Vss34CVDD16CVDD52CVDD142Vss14D8115CVDD68CVDD125CVDD91HD4120NC12HD395NC1HPIENA92HD5124HR/W18HRDY55HD169HD058HD6135EMU1/OFF84NC15NC35NC36NC72NC73NC74NC80NC90NC110NC143NC144NC37Vss126NC38NC71HD76NC2HD281HINT/TOUT151TMS89TRST87TCK88TDI86BIO31XF27EMU083TDO85D12119D11118D13121D14122D15123BCLKR04