逻辑与计算机设计基础-复习课件-浙江大学

[e-mail].2011OutlineAboutFinalExamHighlights&ExercisesABOUTFINALEXAMCourseReviewFinalExam1.Fillintheblank(20points,2pt/per)2.MultipleChoice(20points,2pt/per)3.Optimization(12points,6pt/per)4.CircuitAnalysis(18points)•Combinationalcircuit•Sequentialcircuit5.LogicDesign(30points)•Combinationalcircuit•SequentialcircuitHIGHLIGHTS&EXERCISESCourseReviewChapter1Conversionbetweennumbersystems•Binarynumber,hexadecimalnumberEg.(11011111)2=(DF)16Conversionbetweenbinarynumberanddecimalcode•BCD(binary-codeddecimal)Eg.(10010101)BCD-(01011111)2-(5F)16•ParityBit1000001-01000001(withevenparity)-11000001(withoddparity)HowtogenerateoddparitybitPforany5-bitbinarynumberD4D3D2D1D0？GrayCode&ASCIICharacterCodeDecimalBinaryOctalHexadecimal369.3125101110001.0101561.24171.5189.62510111101.101275.5BD.A214.62511010110.101326.5D6.A62407.6251111001111000111.101171707.5F3C7.AChapter2Booleanalgebra•Dualofanalgebraicexpression:OR-AND,0’s-1’s•DeMorgan’stheorem:(X+Y)’=X’Y’and(XY)’=X’+Y’•IdentitiesofBooleanalgebra:X+YZ=(X+Y)(X+Z)•Consensustheorem:XY+X’Z+YZ=XY+X’Z,(X+Y)(X’+Z)(Y+Z)=(X+Y)(X’+Z)ComplementofafunctionStandardforms•Productterms,sumterms,SOP,POS•Minterms,Maxterms,SOM,POM•RelationshipbetweenSOPandSOM?SOMandPOM?Two-levelcircuitoptimization•Karnaughmap(K-map),Primeimplicants,essentialprimeimplicants•SimplifyinginSOPform(withdon’tcareconditions)•Costcriteria:gateinputcostChapter2Othergates•Buffer,NAND,NOR,3-statebuffer(Hi-Z),XOR,XNORExclusive-ORoperatorandgates•IdentitiesofXORoperation:X⊕Y’=X’⊕Y=(X⊕Y)’X⊕(Y⊕Z)’=(X⊕Y)’⊕Z=(X⊕Y⊕Z)’•OddfunctionandevenfunctionUseoddfunctiontogenerateevenparitybitUseevenfunctiontogenerateoddparitybitTheevenfunctionisobtainedbyreplacingtheoutputgatewithanXNORgate.Podd=X⊕Y⊕Z,Peven=Podd’=(X⊕Y⊕Z)’High-impedanceoutputs•3-statebuffer(Hi-Z)•TransmissiongatesENINOUT0XHi-Z100111Chapter2Exercises:•Thedualofanalgebraicexpressionisobtainedby1)interchangingORandANDoperationsand2)replacing1’sby0’sand0’sby1’s.•UseDeMorgan'sTheoremtocomplementafunction:1)InterchangeANDandORoperators2).Complementeachconstantvalueandliteral•Fourvariablesoddfunctionhas__________“1”squaresinitscorrespondingK-Map.A.4B.7C.8D.14•ThegateinputcostGoffunctionis____.A.15B.14C.13D.12•Whichofthefollowinglogicalgatescanbeusedasacontrollableinverter?__________.A.ANDgateB.XORgateC.BuffergateD.ORgate•TheEssentialPrimeImplicantsintheK-Mapgivenbeloware______.A.Y’Z’,XZ’B.X’Y’,XYC.XY,XZ’D.Y’Z’,X’Y’•GivenbelowarethewaveformsofinputA,BandoutputFofalogicdevice.Thenthedeviceisa______gate.A.NANDB.NORC.XORD.OR()()FABCDCBDADY11111XW11111ZABFChapter2Exercises:1.Accordingtothefollowinglogiccircuitdiagram,writedownthecorrespondingBooleanfunctionandoptimizeittotheformofSOP2.GivenaBooleanfunctionF(W,X,Y,Z)=m(4,6,7,8,12,15)+d(2,3,5,10,11)OptimizeFtogetherwiththedon't-careconditionsdusingaK-mapChapter3Designprocedure:specification,formulation,optimization,technologymapping,verificationTechnologyparameters:fan-in,fan-out,noisemargin,cost,propagationdelay,powerdissipation•Howtocalculategatedelaybasedonfan-out?p.101,example3-1Seven-segmentdisplay•HowtodesignaBCD-to-Seven-Segmentdecoder?p.107,example3-3Technologymapping•HowtoimplementaBooleanfunctionwithNANDgates?•HowtoimplementaBooleanfunctionwithasmallcelllibrary?XYCSXYCSChapter3DelayModel:Transportdelay,Inertialdelay,rejectiontimeProgrammableimplementationtechnologies•ROM,PROM,PALXXXXXXXXXXD7D6D5D4D3D2D1D0A2A1A0F0F1F2F30912345678ANDgatesinputs09Productterm123456789101112F1F2F3F4I1=A12345678I4I2=BI3=CChapter3Programmableimplementationtechnologies•PLAABACBCABFuseintactFuseblownXABCCCBBAA01234XXXXXXXXXXXXXXX1F1F2Outputs1234F211–1ABACBCInputs–11C11–A1–1BPLAprogrammingtable(T)F1(C)ProducttermF1=ABC+ABC+ABCF1=AB+AC+BC+ABCF2=AB+AC+BCF2=AC+AB+BCChapter4n-to-m-LineDecoder:nm2n•3-to-8-LinedecoderDemultiplexer:DecoderwithEnablem-to-n-LineEncoder:nm2nMultiplexers•controlinputs(Sn-1,…S0)calledselectioninputs•2-to-1-LineMultiplexerCombinationalFunctionImplementation•DecodersandORgates,•Multiplexers(andinverter)•ROMs•PLAs:doesn’tprovidefulldecodingofthevariables,soitdoesn’tgeneratealltheminterms•PALs:similartothePLAs•LookupTablesChapter4CombinationalFunctionImplementation•Anycombinationalcircuitwithninputsandmoutputscanbeimplementedwithann-to-2n-linedecoder,andmORgates(oneforeachoutput)aROMwithn-bitaddressesandm-bitdataoutput•Implementmfunctionsofnvariableswithanm-wide2n-to-1-linemultiplexer•Implementmfunctionsofn+1variableswithanm-wide2n-to-1-linemultiplexerandasingleinverter•CananycombinationalcircuitwithninputsandmoutputsbeimplementedwithaPLAwithninputsandmoutputs?aPALwithninputsandmoutputs?D04D05D06D07S1S0ABS2D03D02D01D00OutC11110000Y8-to-1MUXD13D12D11D10OutZ4-to-1MUXS1S0ABCCCCChapter4Exercise•Problem4-23.Implementabinaryfulladderwithadual4-to-1-linemultiplexerandasingleinverter.Chapter5HalfAdderFullAdder•carrygenerate:X·Y•carrypropagate:XYBinaryRippleCarryAdderCarryLookaheadAdderBinarysubtraction•Sign