中北大学分校毕业设计1单片机应用的外文资料AT89S52Features•CompatiblewithMCS-51Products•8KBytesofIn-SystemProgrammable(ISP)FlashMemory–Endurance:10,000Write/EraseCycles•4.0Vto5.5VOperatingRange•FullyStaticOperation:0Hzto33MHz•Three-levelProgramMemoryLock•256x8-bitInternalRAM•32ProgrammableI/OLines•Three16-bitTimer/Counters•EightInterruptSources•FullDuplexUARTSerialChannel•Low-powerIdleandPower-downModes•InterruptRecoveryfromPower-downMode•WatchdogTimer•DualDataPointer•Power-offFlag•FastProgrammingTime•FlexibleISPProgramming(ByteandPageMode)•Green(Pb/Halide-free)PackagingOption1.DescriptionTheAT89S52isalow-power,high-performanceCMOS8-bitmicrocontrollerwith8Kbytesofin-systemprogrammableFlashmemory.ThedeviceismanufacturedusingAtmel’shigh-densitynonvolatilememorytechnologyandiscompatiblewiththeindus-try-standard80C51instructionsetandpinout.Theon-chipFlashallowstheprogrammemorytobereprogrammedin-systemorbyaconventionalnonvolatilememorypro-grammer.Bycombiningaversatile8-bitCPUwithin-systemprogrammableFlashonamonolithicchip,中北大学分校毕业设计2theAtmelAT89S52isapowerfulmicrocontrollerwhichprovidesahighly-flexibleandcost-effectivesolutiontomanyembeddedcontrolapplications.TheAT89S52providesthefollowingstandardfeatures:8KbytesofFlash,256bytesofRAM,32I/Olines,Watchdogtimer,twodatapointers,three16-bittimer/counters,asix-vectortwo-levelinterruptarchitecture,afullduplexserialport,on-chiposcillator,andclockcircuitry.Inaddition,theAT89S52isdesignedwithstaticlogicforoperationdowntozerofrequencyandsupportstwosoftwareselectablepowersavingmodes.TheIdleModestopstheCPUwhileallowingtheRAM,timer/counters,serialport,andinterruptsystemtocontinuefunctioning.ThePower-downmodesavestheRAMcon-tentsbutfreezestheoscillator,disablingallotherchipfunctionsuntilthenextinterruptorhardwarereset.2.PinDescriptionVCC:Supplyvoltage.GND:Ground.Port0:Port0isan8-bitopendrainbidirectionalI/Oport.Asanoutputport,eachpincansinkeightTTLinputs.When1sarewrittentoport0pins,thepinscanbeusedashigh-impedanceinputs.Port0canalsobeconfiguredtobethemultiplexedlow-orderaddress/databusduringaccessestoexternalprogramanddatamemory.Inthismode,P0hasinternalpull-ups.Port0alsoreceivesthecodebytesduringFlashprogrammingandoutputsthecodebytesdur-ingprogramverification.Externalpull-upsarerequiredduringprogramverification.Port1:Port1isan8-bitbidirectionalI/Oportwithinternalpull-ups.ThePort1outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort1pins,theyarepulledhighbytheinter-nalpull-upsandcanbeusedasinputs.Asinputs,Port1pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpull-ups.Inaddition,P1.0andP1.1canbeconfiguredtobethetimer/counter2externalcountinput(P1.0/T2)andthetimer/counter2triggerinput(P1.1/T2EX),respectively,asshowninthefollow-ingtable.Port1alsoreceivesthelow-orderaddressbytesduringFlashprogrammingand中北大学分校毕业设计3verification.Table1PortPinAlternateFunctionsP1.0T2(externalcountinputtoTimer/Counter2),clock-outP1.1T2EX(Timer/Counter2capture/reloadtriggeranddirectioncontrol)P1.5MOSI(usedforIn-SystemProgramming)P1.6MISO(usedforIn-SystemProgramming)P1.7SCK(usedforIn-SystemProgramming)Port2:Port2isan8-bitbidirectionalI/Oportwithinternalpull-ups.ThePort2outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort2pins,theyarepulledhighbytheinter-nalpull-upsandcanbeusedasinputs.Asinputs,Port2pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseoftheinternalpull-ups.Port2emitsthehigh-orderaddressbyteduringfetchesfromexternalprogrammemoryanddur-ingaccessestoexternaldatamemorythatuse16-bitaddresses(MOVX@DPTR).Inthisapplication,Port2usesstronginternalpull-upswhenemitting1s.Duringaccessestoexternaldatamemorythatuse8-bitaddresses(MOVX@RI),Port2emitsthecontentsoftheP2SpecialFunctionRegister.Port2alsoreceivesthehigh-orderaddressbitsandsomecontrolsignalsduringFlashprogram-mingandverification.Port3:Port3isan8-bitbidirectionalI/Oportwithinternalpull-ups.ThePort3outputbufferscansink/sourcefourTTLinputs.When1sarewrittentoPort3pins,theyarepulledhighbytheinter-nalpull-upsandcanbeusedasinputs.Asinputs,Port3pinsthatareexternallybeingpulledlowwillsourcecurrent(IIL)becauseofthepull-ups.Port3receivessomecontrolsignalsforFlashprogrammingandverification.Port3alsoservesthefunctionsofvariousspecialfeaturesoftheAT89S52,asshowninthefol-lowingtable.中北大学分校毕业设计4Table2PortPinAlternateFunctionsP3.0RXD(serialinputport)P3.1TXD(serialoutputport)P3.2INT0(externalinterrupt0)P3.3INT1(externalinterrupt1)P3.4T0(timer0externalinput)P3.5T1(timer1externalinput)P3.6WR(externaldatamemorywritestrobe)P3.7RD(externaldatamemoryreadstrobe)RST:Resetinput.Ahighonthispinfortwomachinecycleswhiletheoscillatorisrunningresetsthedevice.Thispindriveshighfor98oscillatorperiodsaftertheWatchdogtimesout.TheDISRTObitinSFRAUXR(address8EH)canbeusedtodisablethisfeature.InthedefaultstateofbitDISRTO,theRESETHIGHoutfeatureisenabled.ALE/PROG:AddressLatchEnable(ALE)isanoutputpulseforlatchingthelowbyteoftheaddressduringaccessestoexternalmemory.Thispinisalsotheprogrampulseinput(PROG)duringFlashprogramming.Innormaloperation,ALEisemitt