IC datasheet pdf-TLV5604,pdf(2.7-V to 5.5-V 10-Bit

TLV56042.7-VTO5.5-V10-BIT3-µSQUADRUPLEDIGITAL-TO-ANALOGCONVERTERSWITHPOWERDOWNSLAS176B–DECEMBER1997–REVISEDJULY20021POSTOFFICEBOX655303•DALLAS,TEXAS75265Four10-BitD/AConvertersProgrammableSettlingTimeof3µsor9µsTypTMS320,(Q)SPI,andMicrowireCompatibleSerialInterfaceInternalPower-OnResetLowPowerConsumption:5.5mW,SlowMode–5-VSupply3.3mW,SlowMode–3-VSupplyReferenceInputBuffersVoltageOutputRange...2×theReferenceInputVoltageMonotonicOverTemperatureDual2.7-Vto5.5-VSupply(SeparateDigitalandAnalogSupplies)HardwarePowerDown(10nA)SoftwarePowerDown(10nA)SimultaneousUpdateapplicationsBatteryPoweredTestInstrumentsDigitalOffsetandGainAdjustmentIndustrialProcessControlsMachineandMotionControlDevicesCommunicationsArbitraryWaveformGenerationdescriptionTheTLV5604isaquadruple10-bitvoltageoutputdigital-to-analogconverter(DAC)withaflexible4-wireserialinterface.The4-wireserialinterfaceallowsgluelessinterfacetoTMS320,SPI,QSPI,andMicrowireserialports.TheTLV5604isprogrammedwitha16-bitserialwordcomprisedofaDACaddress,individualDACcontrolbits,anda10-bitDACvalue.Thedevicehasprovisionfortwosupplies:onedigitalsupplyfortheserialinterface(viapinsDVDDandDGND),andonefortheDACs,referencebuffersandoutputbuffers(viapinsAVDDandAGND).Eachsupplyisindependentoftheother,andcanbeanyvaluebetween2.7Vand5.5V.ThedualsuppliesallowatypicalapplicationwheretheDACwillbecontrolledviaamicroprocessoroperatingona3-Vsupply(alsousedonpinsDVDDandDGND),withtheDACsoperatingona5-Vsupply.Ofcourse,thedigitalandanalogsuppliescanbetiedtogether.Theresistorstringoutputvoltageisbufferedbyax2gainrail-to-railoutputbuffer.ThebufferfeaturesaClassABoutputstagetoimprovestabilityandreducesettlingtime.Arail-to-railoutputstageandapower-downmodemakesitidealforsinglevoltage,batterybasedapplications.ThesettlingtimeoftheDACisprogrammabletoallowthedesignertooptimizespeedversuspowerdissipation.Thesettlingtimeischosenbythecontrolbitswithinthe16-bitserialinputstring.Ahigh-impedancebufferisintegratedontheREFINABandREFINCDterminalstoreducetheneedforalowsourceimpedancedrivetotheterminal.REFINABandREFINCDallowDACsAandBtohaveadifferentreferencevoltagethenDACsCandD.Thedevice,implementedwithaCMOSprocess,isavailablein16-terminalSOICandTSSOPpackages.TheTLV5604Cischaracterizedforoperationfrom0°Cto70°C.TheTLV5604Iischaracterizedforoperationfrom–40°Cto85°C.Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.Copyright2002,TexasInstrumentsIncorporatedPRODUCTIONDATAinformationiscurrentasofpublicationdate.ProductsconformtospecificationsperthetermsofTexasInstrumentsstandardwarranty.Productionprocessingdoesnotnecessarilyincludetestingofallparameters.12345678161514131211109DVDDPDLDACDINSCLKCSFSDGNDAVDDREFINABOUTAOUTBOUTCOUTDREFINCDAGND(TOPVIEW)DORPWPACKAGESPIandQSPIaretrademarksofMotorola,Inc.MicrowireisatrademarkofNationalSemiconductorCorporation.TLV56042.7-VTO5.5-V10-BIT3-µSQUADRUPLEDIGITAL-TO-ANALOGCONVERTERSWITHPOWERDOWNSLAS176B–DECEMBER1997–REVISEDJULY20022POSTOFFICEBOX655303•DALLAS,TEXAS75265AVAILABLEOPTIONSPACKAGETASOIC(D)TSSOP(PW)0°Cto70°CTLV5604CDTLV5604CPW–40°Cto85°CTLV5604IDTLV5604IPWfunctionalblockdiagram75Power-OnReset14-BitDataandControlRegisterREFINABAGNDCSDINDACASerialInputRegister6910-BitDACLatch2-BitControlDataLatchPowerDown/SpeedControl_+10221014OUTADACSelect/ControlLogicFSDACBDACCDACDOUTBOUTCOUTDLDACPDDGNDAVDDDVDD41516183211121314REFINCDSCLK2x2TLV56042.7-VTO5.5-V10-BIT3-µSQUADRUPLEDIGITAL-TO-ANALOGCONVERTERSWITHPOWERDOWNSLAS176B–DECEMBER1997–REVISEDJULY20023POSTOFFICEBOX655303•DALLAS,TEXAS75265TerminalFunctionsTERMINALI/ODESCRIPTIONNAMENO.I/ODESCRIPTIONAGND9AnaloggroundAVDD16AnalogsupplyCS6IChipselect.Thisterminalisactivelow.DGND8DigitalgroundDIN4ISerialdatainputDVDD1DigitalsupplyFS7IFramesyncinput.ThefallingedgeoftheframesyncpulseindicatesthestartofaserialdataframeshiftedouttotheTLV5604.PD2IPower-downpin.PowersdownallDACs(overridingtheirindividualpowerdownsettings),andalloutputstages.Thisterminalisactivelow.LDAC3ILoadDAC.WhentheLDACsignalishigh,noDACoutputupdatesoccurwhentheinputdigitaldataisreadintotheserialinterface.TheDACoutputsareonlyupdatedwhenLDACislow.REFINAB15IVoltagereferenceinputforDACsAandB.REFINCD10IVoltagereferenceinputforDACsCandD.SCLK5ISerialClockinputOUTA14ODACAoutputOUTB13ODACBoutputOUTC12ODACCoutputOUTD11ODACDoutputabsolutemaximumratingsoveroperatingfree-airtemperaturerange(unlessotherwisenoted)†Supplyvoltage,(DVDD,AVDDtoGND)7V........................................................Supplyvoltagedifference,(AVDDtoDVDD)–2.8Vto2.8V..........................................Digitalinputvoltagerange–0.3VtoDVDD+0.3V.................................................Referenceinputvoltagerange–0.3VtoAVDD+0.3V..............................................Operatingfree-airtemperaturerange,TA:TLV5604C0°Cto70°C...................................TLV5604I–40°Cto85°C..................................Storagetemperaturerange,Tstg–65°C