IC datasheet pdf-TLV5614,pdf(2.7-V to 5.5-V 12-Bit

TLV56142.7-VTO5.5-V12-BIT3-µSQUADRUPLEDIGITAL-TO-ANALOGCONVERTERSWITHPOWERDOWNSLAS188B–SEPTEMBER1998–REVISEDAPRIL20031POSTOFFICEBOX655303•DALLAS,TEXAS75265
Four12-BitD/AConverters
ProgrammableSettlingTimeofEither3µsor9µsTyp
TMS320,(Q)SPI,andMicrowireCompatibleSerialInterface
InternalPower-OnReset
LowPowerConsumption:8mW,SlowMode–5-VSupply3.6mW,SlowMode–3-VSupply
ReferenceInputBuffer
VoltageOutputRange...2×theReferenceInputVoltage
MonotonicOverTemperature
Dual2.7-Vto5.5-VSupply(SeparateDigitalandAnalogSupplies)
HardwarePowerDown(10nA)
SoftwarePowerDown(10nA)
SimultaneousUpdateapplications
BatteryPoweredTestInstruments
DigitalOffsetandGainAdjustment
IndustrialProcessControls
MachineandMotionControlDevices
Communications
ArbitraryWaveformGenerationdescriptionTheTLV5614isaquadruple12-bitvoltageoutputdigital-to-analogconverter(DAC)withaflexible4-wireserialinterface.The4-wireserialinterfaceallowsgluelessinterfacetoTMS320,SPI,QSPI,andMicrowireserialports.TheTLV5614isprogrammedwitha16-bitserialwordcomprisedofaDACaddress,individualDACcontrolbits,anda12-bitDACvalue.Thedevicehasprovisionfortwosupplies:onedigitalsupplyfortheserialinterface(viapinsDVDDandDGND),andonefortheDACs,referencebuffers,andoutputbuffers(viapinsAVDDandAGND).Eachsupplyisindependentoftheother,andcanbeanyvaluebetween2.7Vand5.5V.ThedualsuppliesallowatypicalapplicationwheretheDACiscontrolledviaamicroprocessoroperatingona3Vsupply(alsousedonpinsDVDDandDGND),withtheDACsoperatingona5Vsupply.Ofcourse,thedigitalandanalogsuppliescanbetiedtogether.Theresistorstringoutputvoltageisbufferedbyax2gainrail-to-railoutputbuffer.ThebufferfeaturesaClassABoutputstagetoimprovestabilityandreducesettlingtime.Arail-to-railoutputstageandapower-downmodemakesitidealforsinglevoltage,batterybasedapplications.ThesettlingtimeoftheDACisprogrammabletoallowthedesignertooptimizespeedversuspowerdissipation.Thesettlingtimeischosenbythecontrolbitswithinthe16-bitserialinputstring.Ahigh-impedancebufferisintegratedontheREFINABandREFINCDterminalstoreducetheneedforalowsourceimpedancedrivetotheterminal.REFINABandREFINCDallowDACsAandBtohaveadifferentreferencevoltagethenDACsCandD.TheTLV5614isimplementedwithaCMOSprocessandisavailableina16-terminalSOICpackage.TheTLV5614Cischaracterizedforoperationfrom0°Cto70°C.TheTLV5614Iischaracterizedforoperationfrom–40°Cto85°C.Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.Copyright1998–2003,TexasInstrumentsIncorporatedPRODUCTIONDATAinformationiscurrentasofpublicationdate.ProductsconformtospecificationsperthetermsofTexasInstrumentsstandardwarranty.Productionprocessingdoesnotnecessarilyincludetestingofallparameters.12345678161514131211109DVDDPDLDACDINSCLKCSFSDGNDAVDDREFINABOUTAOUTBOUTCOUTDREFINCDAGND(TOPVIEW)DORPWPACKAGESPIandQSPIaretrademarksofMotorola,Inc.MicrowireisatrademarkofNationalSemiconductorCorporation.TLV56142.7-VTO5.5-V12-BIT3-µSQUADRUPLEDIGITAL-TO-ANALOGCONVERTERSWITHPOWERDOWNSLAS188B–SEPTEMBER1998–REVISEDAPRIL20032POSTOFFICEBOX655303•DALLAS,TEXAS75265AVAILABLEOPTIONSPACKAGETASOIC(D)TSSOP(PW)WSP†(YE)0°Cto70°CTLV5614CDTLV5614CPW––––40°Cto85°CTLV5614IDTLV5614IPWTLV5614IYE†WaferScalePackaging,alsocalledBumpedDice.SeeFigure17.functionalblockdiagramPower-OnReset14-BitDataandControlRegisterREFINABAGNDCSDINDACASerialInputRegister6912-BitDACLatch2-BitControlDataLatchPower-Down/SpeedControl_+_+122221014OUTADACSelect/ControlLogicFSDACBDACCDACDLDACPDDGNDAVDDDVDD741516183211121314REFINCDOUTBOUTCOUTDSCLK5102TLV56142.7-VTO5.5-V12-BIT3-µSQUADRUPLEDIGITAL-TO-ANALOGCONVERTERSWITHPOWERDOWNSLAS188B–SEPTEMBER1998–REVISEDAPRIL20033POSTOFFICEBOX655303•DALLAS,TEXAS75265TerminalFunctionsTERMINALI/ODESCRIPTIONNAMENO.I/ODESCRIPTIONAGND9AnaloggroundAVDD16AnalogsupplyCS6IChipselect.Thisterminalisactivelow.DGND8DigitalgroundDIN4ISerialdatainputDVDD1DigitalsupplyFS7IFramesyncinput.ThefallingedgeoftheframesyncpulseindicatesthestartofaserialdataframeshiftedouttotheTLV5614.PD2IPowerdownpin.PowersdownallDACs(overridingtheirindividualpowerdownsettings),andalloutputstages.Thisterminalisactivelow.LDAC3ILoadDAC.WhentheLDACsignalishigh,noDACoutputupdatesoccurwhentheinputdigitaldataisreadintotheserialinterface.TheDACoutputsareonlyupdatedwhenLDACislow.REFINAB15IVoltagereferenceinputforDACsAandB.REFINCD10IVoltagereferenceinputforDACsCandD.SCLK5ISerialclockinputOUTA14ODACAoutputOUTB13ODACBoutputOUTC12ODACCoutputOUTD11ODACDoutputabsolutemaximumratingsoveroperatingfree-airtemperaturerange(unlessotherwisenoted)†Supplyvoltage,(DVDD,AVDDtoGND)7V........................................................Supplyvoltagedifference,(AVDDtoDVDD)–2.8Vto2.8V..........................................Digitalinputvoltagerange–0.3VtoDVDD+0.3V.................................................Referenceinputvoltagerange–0.3VtoAVDD+0.3V..............................................Operatingfree-airtemperaturerange,TA:TLV5614C0°Cto70°C...................................TLV