74HC595D

DATASHEETProductspecificationSupersedesdataofSeptember1993FileunderIntegratedCircuits,IC061998Jun04INTEGRATEDCIRCUITS74HC/HCT5958-bitserial-in/serialorparallel-outshiftregisterwithoutputlatches;3-stateForacompletedatasheet,pleasealsodownload:•TheIC0674HC/HCT/HCU/HCMOSLogicFamilySpecifications•TheIC0674HC/HCT/HCU/HCMOSLogicPackageInformation•TheIC0674HC/HCT/HCU/HCMOSLogicPackageOutlines1998Jun042PhilipsSemiconductorsProductspecification8-bitserial-in/serialorparallel-outshiftregisterwithoutputlatches;3-state74HC/HCT595FEATURES•8-bitserialinput•8-bitserialorparalleloutput•Storageregisterwith3-stateoutputs•Shiftregisterwithdirectclear•100MHz(typ)shiftoutfrequency•Outputcapability:–paralleloutputs;busdriver–serialoutput;standard•ICCcategory:MSI.APPLICATIONS•Serial-to-paralleldataconversion•Remotecontrolholdingregister.DESCRIPTIONThe74HC/HCT595arehigh-speedSi-gateCMOSdevicesandarepincompatiblewithlowpowerSchottkyTTL(LSTTL).TheyarespecifiedincompliancewithJEDECstandardno.7A.The“595”isan8-stageserialshiftregisterwithastorageregisterand3-stateoutputs.Theshiftregisterandstorageregisterhaveseparateclocks.Dataisshiftedonthepositive-goingtransitionsoftheSHCPinput.Thedataineachregisteristransferredtothestorageregisteronapositive-goingtransitionoftheSTCPinput.Ifbothclocksareconnectedtogether,theshiftregisterwillalwaysbeoneclockpulseaheadofthestorageregister.Theshiftregisterhasaserialinput(DS)andaserialstandardoutput(Q7’)forcascading.Itisalsoprovidedwithasynchronousreset(activeLOW)forall8shiftregisterstages.Thestorageregisterhas8parallel3-statebusdriveroutputs.Datainthestorageregisterappearsattheoutputwhenevertheoutputenableinput(OE)isLOW.QUICKREFERENCEDATAGND=0V;Tamb=25°C;tr=tf=6ns.Notes1.CPDisusedtodeterminethedynamicpowerdissipation(PDinμW):PD=CPD×VCC2×fi+∑(CL×VCC2×fo)where:fi=inputfrequencyinMHzfo=outputfrequencyinMHz∑(CL×VCC2×fo)=sumofoutputsCL=outputloadcapacitanceinpFVCC=supplyvoltageinV2.ForHCtheconditionisVI=GNDtoVCC;forHCTtheconditionisVI=GNDtoVCC-1.5V.SYMBOLPARAMETERCONDITIONSTYP.UNITHCHCTtPHL/tPLHpropagationdelayCL=15pF;VCC=5VSHCPtoQ7’1621nsSTCPtoQn1720nsMRtoQ7’1419nsfmaxmaximumclockfrequencySHCP,STCP10057MHzCIinputcapacitance3.53.5pFCPDpowerdissipationcapacitanceperpackagenotes1and2115130pF1998Jun043PhilipsSemiconductorsProductspecification8-bitserial-in/serialorparallel-outshiftregisterwithoutputlatches;3-state74HC/HCT595ORDERINGINFORMATIONPINNINGTYPENUMBERPACKAGENAMEDESCRIPTIONVERSION74HC595NDIP16plasticdualin-linepackage;16leads(300mil);longbodySOT38-174HC595DSO16plasticsmalloutlinepackage;16leads;bodywidth3.9mmSOT109-174HC595DBSSOP16plasticshrinksmalloutlinepackage;16leads;bodywidth5.3mmSOT338-174HC595PWTSSOP16plasticthinshrinksmalloutlinepackage;16leads;bodywidth4.4mmSOT403-174HCT595NDIP16plasticdualin-linepackage;16leads(300mil);longbodySOT38-174HCT595DSO16plasticsmalloutlinepackage;16leads;bodywidth3.9mmSOT109-1SYMBOLPINDESCRIPTIONQ0toQ715,1to7paralleldataoutputGND8ground(0V)Q7’9serialdataoutputMR10masterreset(activeLOW)SHCP11shiftregisterclockinputSTCP12storageregisterclockinputOE13outputenable(activeLOW)DS14serialdatainputVCC16positivesupplyvoltageFig.1Pinconfiguration.handbook,halfpageQ1Q2Q3Q4Q5Q6Q7Q7'Q0DSGNDSTCPSHCPVCCOE12345678161514131211109595MLA001MRFig.2Logicsymbol.handbook,halfpageOEMR91512345671310141112MLA002Q1Q0Q2Q3Q4Q5Q6Q7Q7'DSSTCPSHCP1998Jun044PhilipsSemiconductorsProductspecification8-bitserial-in/serialorparallel-outshiftregisterwithoutputlatches;3-state74HC/HCT595Fig.3IEClogicsymbol.handbook,halfpageMSA69815912345671D2DC1/101114C21213EN3SRG8R3OEMRQ1Q0Q2Q3Q4Q5Q6Q7Q7'DSSTCPSHCPFig.4Functionaldiagram.handbook,fullpagewidthSTCPDSSHCPMRQ7'8-STAGESHIFTREGISTER8-BITSTORAGEREGISTER141110129OE3-STATEOUTPUTSQ1Q2Q3Q5Q6Q7Q4Q015123456713MLA0031998Jun045PhilipsSemiconductorsProductspecification8-bitserial-in/serialorparallel-outshiftregisterwithoutputlatches;3-state74HC/HCT595Fig.5Logicdiagram.handbook,fullpagewidthSTAGE0STAGES1TO6STAGE7FF0DCPQRLATCHDCPQFF7DCPQRLATCHDCPQMLA010DQQ1Q2Q3Q4Q5Q6Q7Q7'Q0DSSTCPSHCPOEMR1998Jun046PhilipsSemiconductorsProductspecification8-bitserial-in/serialorparallel-outshiftregisterwithoutputlatches;3-state74HC/HCT595FUNCTIONTABLENotes1.H=HIGHvoltagelevel;L=LOWvoltagelevel↑=LOW-to-HIGHtransition;↓=HIGH-to-LOWtransitionZ=high-impedanceOFF-state;NC=nochangeX=don’tcare.INPUTSOUTPUTSFUNCTONSHCPSTCPOEMRDSQ7’QNXXLLXLNCaLOWlevelonMRonlyaffectstheshiftregistersX↑LLXLLemptyshiftregisterloadedintostorageregisterXXHLXLZshiftregisterclear.Paralleloutputsinhigh-impedanceOFF-state↑XLHHQ6’NClogichighlevelshiftedintoshiftregisterstage0.Contentsofallshiftregisterstagesshiftedthrough,e.g.previousstateofstage6(internalQ6’)appearsontheserialoutput(Q7’)X↑LHXNCQn’contentsofshiftregisterstages(internalQn’)aretransferredtothestorageregisterandparalleloutputstages↑↑LHXQ6’Qn’contentsofshiftregistershiftedthrough.Previouscontentsoftheshiftregisteristransferredtothestorageregisterandtheparalleloutputstages.1998Jun047PhilipsSemiconductorsProductspecification8-bitserial-in/serialorparallel-outshiftregi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