Unit10ComputerProgramDesignLesson24Memory《电子技术专业英语教程》冯新宇主编电子工业出版社《电子技术专业英语教程》2Lesson24Memory•Backgrounds•Texttour•Languageinuse–Vocabulary–Structure–Reading/writingtechniques2020/1/31《电子技术专业英语教程》3•Terminology–RAM随机存储器–DRAM动态随机存储器–DDR(DoubleDataRate)双倍数据数率–prefetching预取指令,预取数–doubletransitionclocking双倍传输时钟–DIMM双直列内存模块;–双线内存模块–operatingsystem操作系统–peakbandwidth峰值带宽Backgrounds2020/1/31《电子技术专业英语教程》4Texttour•Outline-Introduction-DDR1-DDR2-DDR32020/1/31《电子技术专业英语教程》5Introduction•Processorsusesystemmemorytotemporarilystoretheoperatingsystem,mission-criticalapplications,andthedatatheyuseandmanipulate.Therefore,theperformanceoftheapplicationsandreliabilityofthedataareintrinsicallytiedtothespeedandbandwidthofthesystemmemory.•Overtheyears,thesefactorshavedriventheevolutionofsystemmemoryfromasynchronousDRAMtechnologies,suchasFastPageMode(FPM)memoryandExtendedDataOutput(EDO)memory,tohigh-bandwidthsynchronousDRAM(SDRAM)technologies.•Yet,systemmemorybandwidthhasnotkeptpacewithimprovementsinprocessorperformance,thuscreatinga“performancegap”.Processorperformance,whichisoftenequatedtothenumberoftransistorsinachip,doubleseverycoupleofyears.Ontheotherhand,memorybandwidthdoublesroughlyeverythreeyears.Therefore,ifprocessorandmemoryperformancecontinuetoincreaseattheserates,theperformancegapbetweenthemwillwiden.2020/1/31《电子技术专业英语教程》6Introduction•Whyistheprocessor-memoryperformancegapimportant?•Theprocessorisforcedtoidlewhileitwaitsfordatafromsystemmemory.Thus,theperformancegappreventsmanyapplicationsfromeffectivelyusingthefullcomputingpowerofmodernprocessors.•Inanattempttonarrowtheperformancegap,theindustryvigorouslypursuesthedevelopmentofnewmemorytechnologies.•HPworkswithJointElectronicDeviceEngineeringCouncil(JEDEC)memoryvendorsandchipsetdevelopersduringmemorytechnologydevelopmenttoensurethatnewmemoryproductsfulfillcustomerneedsinregardstoreliability,cost,andbackwardcompatibility.2020/1/31《电子技术专业英语教程》7DDR1•TodevelopthefirstgenerationofDDRSDRAM(DDR-1),designersmadeenhancementstotheSDRAMcoretoincreasethedatarate.Theseenhancementsincludeprefetching,doubletransitionclocking,strobe-baseddatabus,andSSTL[1]_2lowvoltagesignaling.At400MHz,DDRincreasesmemorybandwidthto3.2GB/s,thisis400percentmorethanoriginalSDRAM.2020/1/31《电子技术专业英语教程》8DDR1•InSDRAM,onebitperclockcycleistransferredfromthememorycellarraytotheinput/output(I/O)bufferordataqueue(DQ).TheI/Obufferreleasesonebittothebusperpinandclockcycle(ontherisingedgeoftheclocksignal).Todoublethedatarate,DDRSDRAMusesatechniquecalledprefetchingtotransfertwobitsfromthememorycellarraytotheI/Obufferintwoseparatepipelines.ThentheI/Obufferreleasesthebitsintheorderofthequeueonthesameoutputline.Thisisknownas2n-prefetcharchitecturebecausethetwodatabitsarefetchedfromthememorycellarraybeforetheyarereleasedtothebusinatimemultiplexedmanner.2020/1/31《电子技术专业英语教程》9DDR1•StandardDRAMtransfersonedatabittothebusontherisingedgeofthebusclocksignal,whileDDR-1usesboththerisingandfallingedgesoftheclocktotriggerthedatatransfertothebus.Thistechnique,knownasdoubletransitionclocking,deliverstwicethebandwidthofSDRAMwithoutincreasingtheclockfrequency.DDR-1hastheoreticalpeakdatatransferratesof1.6and2.1GB/satclockfrequenciesof100MHzand133MHz,respectively.2020/1/31《电子技术专业英语教程》10•AnotherdifferencebetweenSDRAMandDDR-1isthesignalingtechnology.Insteadofusinga3.3Voperatingvoltage,DDR-1usesa2.5VsignalingspecificationknownasStubSeries-TerminatedLogic_2(SSTL_2).Thislow-voltagesignalingresultsinlowerpowerconsumptionandimprovedheatdissipation.AppearanceinFigure24-1.Figure24-1DDR1MEMORY2020/1/31《电子技术专业英语教程》11DDR2•DDR-2SDRAMisthesecondgenerationofDDRSDRAM.Itoffersdataratesofupto6.4GB/s,lowerpowerconsumption,andimprovementsinpackaging.At400MHzand800Mb/s,DDR-2increasesmemorybandwidthto6.4GB/s,whichis800percentmorethanoriginalSDRAM.DDR-2SDRAMachievesthishigherlevelofperformanceandlowerpowerconsumptionthroughfasterclocks,1.8Voperationandsignaling,andsimplificationofthecommandset.The240-pinconnectoronDDR-2isneededtoaccommodatedifferentialstrobessignals.AppearanceinFigure24-2.2020/1/31《电子技术专业英语教程》12Figure24-2DDR2MEMORY2020/1/31《电子技术专业英语教程》13DDR3•DDR-3,thethird-generationofDDRSDRAMtechnology,willmakefurtherimprovementsinbandwidthandpowerconsumption.ManufacturersofDDR-3willinitiallyuse90nmfabricationtechnologyandmovetoward70nmasproductionvolumesincrease.DDR-3willoperateatclockratesfrom400MHzto800MHzwiththeoreticalpeakbandwidthsrangingfrom6.40GB/sto12.8GB/s.DDR-3isexpectedtoreducepowerconsumptionbyupto30%comparedtoaDDR-2DIMMoperatingatthesamespeed.DDR-3DIMMsareexpectedtousethesame240-pinconnectorasDDR2DIMMs,butthekeynotchwillbeinadifferentposition.2020/1/31《电子技术专业英语教程》14SummaryofDDRSDRAMtechnologiesTypeComponentnamingconventionModulenamingconventionBusspeedPeakbandwidthDDR-1DDR200PC1600100MHz1.6GB/sDDR266PC2100133MHz2.1GB/sDDR333PC2700166MHz2.7GB/sDDR400PC3200200MHz3.2GB/sDDR-2DDR2-400PC2-3200R200MHz3.2GB/sDDR2-533PC2-4300266MHz4.3GB/sDDR2-667PC2-5300333MHz5.3GB/sDDR2-800PC2-6400400MHz6.4GB/sDDR-3DDR3-800PC3-6400400MHz6.4GB/sD