四、课程设计的总体步骤1、单个字符的显示(如:黄):libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityxianshiisport(clk2:instd_logic;rck,sck:outstd_logic;si:outstd_logic);end;architectureoneofxianshiissignalsel:std_logic_vector(3downto0);signalq:std_logic_vector(31downto0);signali:integerrange0to31;signalcoi:std_logic;beginprocess(sel,clk1)begincaseseliswhen0000=q=00000100000000000111111111111111;when0001=q=00000100000000011011111111111111;when0010=q=00100100000000011101111111111111;when0011=q=00100101111110101110111111111111;when0100=q=00100101010100101111011111111111;when0101=q=11111101010101001111101111111111;when0110=q=00100101010100001111110111111111;when0111=q=00100111111100001111111011111111;when1000=q=00100101010100001111111101111111;when1001=q=11111101010101001111111110111111;when1010=q=00100101010101001111111111011111;when1011=q=01100111111100101111111111101111;when1100=q=00100100100000101111111111110111;when1101=q=00001100000000011111111111111011;when1110=q=00000100000000001111111111111101;when1111=q=00000000000000001111111111111110;whenothers=null;endcase;ifclk1'eventandclk1='1'thensi=q(i);i=i+1;coi='0';ifi=31theni=0;coi='1';sel=sel+'1';endif;rck=notcoi;endif;endprocess;sck=clk1;end;时序仿真:从图中可以看出,当clk1在第32个上升沿rck变为低电频,sck与clk1是同一电频,故此程序满足要求。2、多个字符的跳动显示(如:黄小红):libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityxianshiisport(clk1:instd_logic;clk2:instd_logic;rck,sck:outstd_logic;si:outstd_logic);end;architectureoneofxianshiissignallie:std_logic_vector(3downto0);signalsel:std_logic_vector(3downto0);signalq:std_logic_vector(31downto0);signali:integerrange0to31;signalcoi:std_logic;beginprocess(sel,clk1,clk2)beginifclk2'eventandclk2='1'thenlie=lie+'1';endif;caselieiswhen0000=caseseliswhen0000=q=00000100000000000111111111111111;when0001=q=00000100000000011011111111111111;when0010=q=00100100000000011101111111111111;when0011=q=00100101111110101110111111111111;when0100=q=00100101010100101111011111111111;when0101=q=11111101010101001111101111111111;when0110=q=00100101010100001111110111111111;when0111=q=00100111111100001111111011111111;when1000=q=00100101010100001111111101111111;when1001=q=11111101010101001111111110111111;when1010=q=00100101010101001111111111011111;when1011=q=01100111111100101111111111101111;when1100=q=00100100100000101111111111110111;when1101=q=00001100000000011111111111111011;when1110=q=00000100000000001111111111111101;when1111=q=00000000000000001111111111111110;whenothers=null;endcase;when0001=caseseliswhen0000=q=00000000000000000111111111111111;when0001=q=00000000000100001011111111111111;when0010=q=00000000001000001101111111111111;when0011=q=00000000010000001110111111111111;when0100=q=00000001100000001111011111111111;when0101=q=00000110000000101111101111111111;when0110=q=00000000000000011111110111111111;when0111=q=11111111111111101111111011111111;when1000=q=00000000000000001111111101111111;when1001=q=00000100000000001111111110111111;when1010=q=00000010000000001111111111011111;when1011=q=00000001000000001111111111101111;when1100=q=00000000100000001111111111110111;when1101=q=00000000011000001111111111111011;when1110=q=00000000000000001111111111111101;when1111=q=00000000000000001111111111111110;whenothers=null;endcase;when0010=caseseliswhen0000=q=00000100010001000111111111111111;when0001=q=00001100111001101011111111111111;when0010=q=00110101010001001101111111111111;when0011=q=11000110010010001110111111111111;when0100=q=00000100010010001111011111111111;when0101=q=00001000010010101111101111111111;when0110=q=00100000000000101111110111111111;when0111=q=00100000000000101111111011111111;when1000=q=00100000000000101111111101111111;when1001=q=00100000000000101111111110111111;when1010=q=00111111111111101111111111011111;when1011=q=00100000000000101111111111101111;when1100=q=01100000000000101111111111110111;when1101=q=00100000000001101111111111111011;when1110=q=00000000000000101111111111111101;when1111=q=00000000000000001111111111111110;whenothers=null;endcase;whenothers=null;endcase;ifclk1'eventandclk1='1'thensi=q(i);i=i+1;coi='0';ifi=31theni=0;coi='1';sel=sel+'1';endif;rck=notcoi;endif;endprocess;sck=clk1;end;时序仿真:从上图看出,当clk1在第32个上升沿rck变为低电频,sck与clk1是同一电频,故此程序满足要求。3、汉字的滚动和动画显示(如:黄小红+笑脸):libraryieee;useieee.std_logic_1164.all;useieee.std_logic_unsigned.all;entityxianshiisport(clk1:instd_logic;clk2:instd_logic;rck,sck:outstd_logic;si:outstd_logic);end;architectureoneofxianshiissignallie:std_logic_vector(3downto0);signalsel:std_logic_vector(3downto0);signalq:std_logic_vector(31downto0);signali:integerrange0to31;signalcoi:std_logic;beginprocess(sel,clk1,clk2)beginifclk2'eventandclk2='1'thenlie=lie+'1';endif;caselieiswhen0000=caseseliswhen0000=q=00000100000000000111111111111111;when0001=q=00000100000000011011111111111111;when0010=q=00100100000000011101111111111111;when0011=q=00100101111110101110111111111111;when0100=q=