MAX5100中文资料

Forfreesamples&thelatestliterature:(DAC)operatesfromasin-gle+2.7Vto+5.5Vsupplyandcomesinaspace-sav-ing20-pinTSSOPpackage.InternalprecisionbuffersswingRail-to-Rail®,andthereferenceinputrangeincludesbothgroundandthepositiverail.AllfourDACsshareacommonreferenceinput.TheMAX5100providesdouble-bufferedlogicinputs:four8-bitbufferregistersfollowedbyfour8-bitDACregisters.ThiskeepstheDACoutputsfromchangingduringthewriteoperation.Anasynchronouscontrolpin,LDAC,allowsforsimultaneousupdatingoftheDACregisters.TheMAX5100featuresashutdownmodethatreducescurrentto1nA,aswellasapower-onresetmodethatresetsallregisterstocode00hexonpower-up.ApplicationsDigitalGainandOffsetAdjustmentsProgrammableAttenuatorsPortableInstrumentsPower-AmpBiasControlFeatures+2.7Vto+5.5VSingle-SupplyOperationUltra-LowSupplyCurrent0.4mAwhileOperating1nAinShutdownModeUltra-Small20-PinTSSOPPackageGroundtoVDDReferenceInputRangeOutputBufferAmplifiersSwingRail-to-RailDouble-BufferedRegistersforSynchronousUpdatingPower-OnResetSetsAllRegisterstoZeroMAX5100+2.7Vto+5.5V,Low-Power,Quad,Parallel8-BitDACwithRail-to-RailVoltageOutputs________________________________________________________________MaximIntegratedProducts1201918171615141312345678OUTCOUTDGNDA0REFVDDOUTAOUTBTOPVIEWA1LDACD0D1D6D7WRSHDN1211910D2D3D4D5MAX5100TSSOP19-1557;Rev0;10/99PARTMAX5100AEUPMAX5100BEUP-40°Cto+85°C-40°Cto+85°CTEMP.RANGEPIN-PACKAGE20TSSOP20TSSOPPinConfigurationOrderingInformationRail-to-RailisaregisteredtrademarkofNipponMotorola,Ltd.INL(LSB)±1±2MAX5100+2.7Vto+5.5V,Low-Power,Quad,Parallel8-BitDACwithRail-to-RailVoltageOutputs2_______________________________________________________________________________________ABSOLUTEMAXIMUMRATINGSELECTRICALCHARACTERISTICS(VDD=VREF=+2.7Vto+5.5V,RL=10kΩ,CL=100pF,TA=TMINtoTMAX,unlessotherwisenoted.TypicalvaluesareatVDD=VREF=+3VandTA=+25°C.)Stressesbeyondthoselistedunder“AbsoluteMaximumRatings”maycausepermanentdamagetothedevice.Thesearestressratingsonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedintheoperationalsectionsofthespecificationsisnotimplied.Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectdevicereliability.VDDtoGND..............................................................-0.3Vto+6VD_,A_,WR,SHDN,LDACtoGND...........................-0.3Vto+6VREFtoGND................................................-0.3Vto(VDD+0.3V)OUT_toGND...........................................................-0.3VtoVDDMaximumCurrentintoAnyPin.........................................±50mAContinuousPowerDissipation(TA=+70°C)20-PinTSSOP(derate7.0mW/°Cabove+70°C).......559mWOperatingTemperatureRangeMAX5100_EUP..............................................-40°Cto+85°CMaximumJunctionTemperature.....................................+150°CStorageTemperatureRange.............................-65°Cto+150°CLeadTemperature(soldering,10sec).............................+300°CVDD=4.5Vto5.5V,VREF=4.096VVDD=2.7Vto3.6V,VREF=2.5VVIN=VDDorGNDMAX5100AVDD=3.6Vto5.5VVDD=2.7Vto3.6VRL=∞Code=F0hexCode=F0hexCode=00hexMAX5100BGuaranteedmonotonicCode=00hexCode=00hex,VDD=2.7Vto5.5VCONDITIONSµA±1.0IINInputCurrentV0.8VILInputLowVoltage3V2VIHInputHighVoltageV0VREFOutputVoltageRangepF15InputCapacitancekΩ320460600InputResistanceV0VDDInputVoltageRange1LSB±1INLIntegralNonlinearity(Note1)Bits8ResolutionLSB1Power-SupplyRejectionLSB/°C±0.001Gain-ErrorTemperatureCoefficient%±1GainError(Note2)µV/°C±10Zero-CodeTemperatureCoefficient±2LSB±1DNLDifferentialNonlinearity(Note1)mV±20ZCEZero-CodeErrormV10Zero-Code-ErrorSupplyRejectionUNITSMINTYPMAXSYMBOLPARAMETERpF10CINInputCapacitanceCode=FFhexSTATICACCURACYREFERENCEINPUTDACOUTPUTSDIGITALINPUTSMAX5100+2.7Vto+5.5V,Low-Power,Quad,Parallel8-BitDACwithRail-to-RailVoltageOutputs_______________________________________________________________________________________3Note1:Reduceddigitalcoderange(code00hextocodeF0hex)duetoswinglimitationswhentheoutputamplifierisloaded.Note2:Gainerroris:[100(VF0,meas-ZCE-VF0,ideal)/VREF].WhereVF0,measistheDACoutputvoltagewithinputcodeF0hex,andVF0,idealistheidealDACoutputvoltagewithinputcodeF0hex(i.e.,VREF·240/256).Note3:Outputsettlingtimeismeasuredfromthe50%pointofthefallingedgeofWRto±1/2LSBofVOUT’sfinalvalue.Note4:Channel-to-channelisolationisdefinedastheglitchenergyataDACoutputinresponsetoafull-scalestepchangeonanyotherDACoutput.Themeasuredchannelhasafixedcodeof80hex.Note5:DigitalfeedthroughisdefinedastheglitchenergyatanyDACoutputinresponsetoafull-scalestepchangeonalleightdatainputswithWRatVDD.Note6:RL=∞,digitalinputsatGNDorVDD.Note7:Timingmeasurementreferencelevelis(VIH+VIL)/2.Note8:IfLDACisactivatedpriortoWR’srisingedge,itmuststaylowfortLD(orlonger)afterWRgoeshigh.ELECTRICALCHARACTERISTICS(continued)(VDD=VREF=+2.7Vto+5.5V,RL=10kΩ,CL=100pF,TA=TMINtoTMAX,unlessotherwisenoted.TypicalvaluesareatVDD=VREF=+3VandTA=+25°