CAT24C08WI-GT3中文资料

1©2006byCatalystSemiconductor,Inc.CharacteristicssubjecttochangewithoutnoticeDoc.No.1115,Rev.CCAT24C01/02/04/08/161-Kb,2-Kb,4-Kb,8-Kband16-KbCMOSSerialEEPROMPINCONFIGURATIONFUNCTIONALSYMBOLFEATURES■SupportsStandardandFastI2CProtocol■1.8Vto5.5VSupplyVoltageRange■16-BytePageWriteBuffer■HardwareWriteProtectionforentirememory■SchmittTriggersandNoiseSuppressionFiltersonI2CBusInputs(SCLandSDA).■LowpowerCMOStechnology■1,000,000program/erasecycles■100yeardataretention■Industrialtemperaturerange■RoHS-compliant8-leadPDIP,SOIC,MSOPandTSSOP,8-padTDFNand5-leadTSOT-23packages.PDIP(L)SOIC(W)TSSOP(Y)MSOP(Z)TDFN(VP2)VCCVSSSDASCLWPCAT24CxxA2,A1,A0DEVICEDESCRIPTIONTheCAT24C01/02/04/08/16are1-Kb,2-Kb,4-Kb,8-Kband16-KbrespectivelyCMOSSerialEEPROMdevicesorganizedinternallyas8/16/32/64and128pagesrespectivelyof16byteseach.AlldevicessupportboththeStandard(100kHz)aswellasFast(400kHz)I2Cprotocol.Dataiswrittenbyprovidingastartingaddress,thenloading1to16contiguousbytesintoaPageWriteBuffer,andthenwritingalldatatonon-volatilememoryinoneinternalwritecycle.Dataisreadbyprovidingastartingaddressandthenshiftingoutdataseriallywhileautomaticallyincrementingtheinternaladdresscount.ExternaladdresspinsmakeitpossibletoaddressuptoeightCAT24C01orCAT24C02,fourCAT24C04,twoCAT24C08andoneCAT24C16deviceonthesamebus.8765VCCWPSCLSDANC/A2/A2/A2/A2NC/NC/NC/A0/A0CAT24C16/08/04/02/01NC/NC/A1/A1/A1VSS1234ForthelocationofPin1,pleaseconsultthecorrespondingpackagedrawing.PINFUNCTIONSA0,A1,A2DeviceAddressInputsSDASerialDataInput/OutputSCLSerialClockInputWPWriteProtectInputVCCPowerSupplyVSSGroundNCNoConnect*CatalystcarriestheI2CprotocolunderalicensefromthePhilipsCorporation.TSOT-23(TD)54WPVCCSCLVSSSDA123ForOrderingInformationdetails,seepage16.CAT24C01/02/04/08/162Doc.No.1115,Rev.C©2006byCatalystSemiconductor,Inc.CharacteristicssubjecttochangewithoutnoticeABSOLUTEMAXIMUMRATINGS(1)StorageTemperature-65°Cto+150°CVoltageonAnyPinwithRespecttoGround(2)-0.5Vto+6.5VRELIABILITYCHARACTERISTICS(3)SymbolParameterMinUnitsNEND(4)Endurance1,000,000Program/EraseCyclesTDRDataRetention100YearsD.C.OPERATINGCHARACTERISTICSVCC=1.8Vto5.5V,TA=-40°Cto85°C,unlessotherwisespecified.SymbolParameterTestConditionsMinMaxUnitsICCRReadCurrentRead,fSCL=400kHz1mAICCWWriteCurrentWrite,fSCL=400kHz1mAISBStandbyCurrentAllI/OPinsatGNDorVCC1μAILI/OPinLeakagePinatGNDorVCC1μAVILInputLowVoltage-0.5VCCx0.3VVIHInputHighVoltageVCCx0.7VCC+0.5VVOL1OutputLowVoltageVCC≥2.5V,IOL=3.0mA0.4VVOL2OutputLowVoltageVCC2.5V,IOL=1.0mA0.2VPINIMPEDANCECHARACTERISTICSVCC=1.8Vto5.5V,TA=-40°Cto85°C,unlessotherwisespecified.SymbolParameterConditionsMaxUnitsCIN(3)SDAI/OPinCapacitanceVIN=0V8pFCIN(3)InputCapacitance(otherpins)VIN=0V6pFIWP(5)WPInputCurrentVINVIH,VCC=5.5V200μAVINVIH,VCC=3.3V150VINVIH,VCC=1.8V100VINVIH1Note:(1)Stressesabovethoselistedunder“AbsoluteMaximumRatings”maycausepermanentdamagetothedevice.Thesearestressratingsonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsoutsideofthoselistedintheoperationalsectionsofthisspeci-ficationisnotimplied.Exposuretoanyabsolutemaximumratingforextendedperiodsmayaffectdeviceperformanceandreliability.(2)TheDCinputvoltageonanypinshouldnotbelowerthan-0.5VorhigherthanVCC+0.5V.Duringtransitions,thevoltageonanypinmayundershoottonolessthan-1.5VorovershoottonomorethanVCC+1.5V,forperiodsoflessthan20ns.(3)TheseparametersaretestedinitiallyandafteradesignorprocesschangethataffectstheparameteraccordingtoappropriateAEC-Q100andJEDECtestmethods.(4)PageMode,VCC=5V,25°C(5)Whennotdriven,theWPpinispulleddowntoGNDinternally.Forimprovednoiseimmunity,theinternalpull-downisrelativelystrong;thereforetheexternaldrivermustbeabletosupplythepull-downcurrentwhenattemptingtodrivetheinputHIGH.Toconservepower,astheinputlevelexceedsthetrippointoftheCMOSinputbuffer(~0.5xVCC),thestrongpull-downrevertstoaweakcurrentsource.CAT24C01/02/04/08/163DocNo.1115,Rev.C©2006byCatalystSemiconductor,Inc.CharacteristicssubjecttochangewithoutnoticeA.C.CHARACTERISTICS(1)VCC=1.8Vto5.5V,TA=-40°Cto85°C.SymbolParameterStandardFastUnitsMinMaxMinMaxFSCLClockFrequency100400kHztHD:STASTARTConditionHoldTime40.6μstLOWLowPeriodofSCLClock4.71.3μstHIGHHighPeriodofSCLClock40.6μstSU:STASTARTConditionSetupTime4.70.6μstHD:DATDataInHoldTime00μstSU:DATDataInSetupTime250100nstRSDAandSCLRiseTime1000300nstF(2)SDAandSCLFallTime300300nstSU:STOSTOPConditionSetupTime40.6μstBUFBusFreeTimeBetweenSTOPandSTART4.71.3μstAASCLLowtoDataOutValid3.50.9μstDHDataOutHoldTime100100nsTi(2)NoisePulseFilteredatSCLandSDAInputs100100nstSU:WPWPSetupTime00μstHD:WPWPHoldTime2.52.5μstWRWriteCycleTime55mstPU(2,3)Power-uptoReadyMode11msNote:(1)Testconditionsaccordingto“A.C.TestConditions”table.(2)Testedinitiallyandafteradesignorprocesschangethataffectsthisparameter.(3)tPUisthedelaybetweenthetimeVCCisstableandthedeviceisreadytoacceptcommands.A.C.TESTCONDITIONSInputLevels0.2xVCCto0.8xVCCInputRiseandFallTimes≤50nsInputReferenceLevels0.3xVCC,0.7xVCCOutputReferenceLevels0.5xVCCOutputLoadCurrentSource:IOL=3mA(VCC≥2.5V);IOL=1mA(VCC2.5V);CL=100pFCAT24C01/02/04/08/164Doc.No.1115,Re