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1.//----------------------------------------------------------------------------2.//Description:ThisfilecontainsfunctionsthatallowtheMSP430deviceto3.//accesstheSPIinterfaceoftheCC1100/CC2500.Therearemultiple4.//instancesofeachfunction;theonetobecompiledisselectedbythe5.//systemvariableTI_CC_RF_SER_INTF,definedinTI_CC_hardware_board.h.6.//7.//MSP430/CC1100-2500InterfaceCodeLibraryv1.08.//9.//K.Quiring10.//TexasInstruments,Inc.11.//July200612.//IAREmbeddedWorkbenchv3.4113.//----------------------------------------------------------------------------14.15.16.#includeinclude.h17.#includeTI_CC_spi.h18.19.20.//----------------------------------------------------------------------------21.//voidTI_CC_SPISetup(void)22.//23.//DESCRIPTION:24.//ConfigurestheassignedinterfacetofunctionasaSPIportand25.//initializesit.26.//----------------------------------------------------------------------------27.//voidTI_CC_SPIWriteReg(charaddr,charvalue)28.//29.//DESCRIPTION:30.//Writesvaluetoasingleconfigurationregisterataddressaddr.31.//----------------------------------------------------------------------------32.//voidTI_CC_SPIWriteBurstReg(charaddr,char*buffer,charcount)33.//34.//DESCRIPTION:35.//Writesvaluestomultipleconfigurationregisters,thefirstregisterbeing36.//ataddressaddr.Firstdatabyteisatbuffer,andbothaddrand37.//bufferareincrementedsequentially(withintheCCxxxxandMSP430,38.//respectively)untilcountwriteshavebeenperformed.39.//----------------------------------------------------------------------------40.//charTI_CC_SPIReadReg(charaddr)41.//42.//DESCRIPTION:43.//Readsasingleconfigurationregisterataddressaddrandreturnsthe44.//valueread.45.//----------------------------------------------------------------------------46.//voidTI_CC_SPIReadBurstReg(charaddr,char*buffer,charcount)47.//48.//DESCRIPTION:49.//Readsmultipleconfigurationregisters,thefirstregisterbeingataddress50.//addr.Valuesreadaredepositedsequentiallystartingataddress51.//buffer,untilcountregistershavebeenread.52.//----------------------------------------------------------------------------53.//charTI_CC_SPIReadStatus(charaddr)54.//55.//DESCRIPTION:56.//Specialreadfunctionforreadingstatusregisters.Readsstatusregister57.//atregisteraddrandreturnsthevalueread.58.//----------------------------------------------------------------------------59.//voidTI_CC_SPIStrobe(charstrobe)60.//61.//DESCRIPTION:62.//Specialwritefunctionforwritingtocommandstroberegisters.Writes63.//tothestrobeataddressaddr.64.//----------------------------------------------------------------------------65.66.67.//Delayfunction.#ofCPUcyclesdelayedissimilartocycles.Specifically,68.//it's((cycles-15)%6)+15.Notexact,butgivesasenseofthereal-time69.//delay.Also,ifMCLK~1MHz,cyclesissimilarto#ofusecondsdelayed.70.voidTI_CC_Wait(unsignedintcycles)71.{72.while(cycles15)//15cyclesconsumedbyoverhead73.cycles=cycles-6;//6cyclesconsumedeachiteration74.}75.76.77.//SPIportfunctions78.#ifTI_CC_RF_SER_INTF==TI_CC_SER_INTF_USART079.80.81.voidTI_CC_SPISetup(void)82.{83.TI_CC_CSn_PxOUT|=TI_CC_CSn_PIN;84.TI_CC_CSn_PxDIR|=TI_CC_CSn_PIN;///CSdisable85.86.ME1|=USPIE0;//EnableUSART0SPImode87.UCTL0|=CHAR+SYNC+MM;//8-bitSPIMaster**SWRST**88.UTCTL0|=CKPH+SSEL1+SSEL0+STC;//SMCLK,3-pinmode89.UBR00=0x02;//UCLK/290.UBR10=0x00;//091.UMCTL0=0x00;//Nomodulation92.TI_CC_SPI_USART0_PxSEL|=TI_CC_SPI_USART0_SIMO|TI_CC_SPI_USART0_SOMI|TI_CC_SPI_USART0_UCLK;93.//SPIoptionselect94.TI_CC_SPI_USART0_PxDIR|=TI_CC_SPI_USART0_SIMO+TI_CC_SPI_USART0_UCLK;95.//SPITXoutdirection96.UCTL0&=~SWRST;//InitializeUSARTstatemachine97.}98.99.voidTI_CC_SPIWriteReg(charaddr,charvalue)100.{101.TI_CC_CSn_PxOUT&=~TI_CC_CSn_PIN;///CSenable102.while(TI_CC_SPI_USART0_PxIN&TI_CC_SPI_USART0_SOMI);//WaitforCCxxxxready103.IFG1&=~URXIFG0;//Clearflagfromfirstdummybyte104.U0TXBUF=addr;//Sendaddress105.while(!(IFG1&URXIFG0));//WaitforTXtofinish106.IFG1&=~URXIFG0;//Clearflagfromfirstdummybyte107.U0TXBUF=value;//Sendvalue108.while(!(IFG1&URXIFG0));//WaitforendofdataTX109.TI_CC_CSn_PxOUT|=TI_CC_CSn_PIN;///CSdisable110.}111.112.voidTI_CC_SPIWriteBurstReg(charaddr,char*buffer,charcount)113.{114.chari;115.116.TI_CC_CSn_PxOUT&=~TI_CC_CSn_PIN;///CSenable117.while(TI_CC_SPI_USART0_PxIN&TI_CC_SPI_USART0_SOMI);//WaitforCCxxxxready118.U0TXBUF=addr|TI_CCxxx0_WRITE_BURST;//Sendaddress119.while(!(IFG1&UTXIFG0));//WaitforTXtofinish120.for(i=0;icount;i++)121.{122.U0TXBUF=buffer[i];//Senddata123.while(!(IFG1&UTXIFG0));//WaitforTXtofinish124.}125.IFG1&=~URXIFG0;126.while(!(IFG1&URXIFG0));127.TI_CC_CSn_PxOUT|=TI_CC_CSn_PIN;///CSdisable128.}129.130.charTI_CC_SPIReadReg(charaddr)131.{132.charx;133.134.TI_CC_CSn_PxOUT&=~TI_CC_CSn_PIN;///CSenable135.while(TI_CC_SPI_USART0_PxIN&TI_CC_SPI_USART0_SOMI);//WaitforCCxxxxready136.U0TXBUF=(addr|TI_CCxxx0_READ_SINGLE);//Sendaddress137.while(!(IFG1&URXIFG0));//WaitforTXtofinish138.IFG1&=~URXIFG0;//Clearflagsetduringlastwrite139.U0TXBUF=0;//Dummywritesowecanreaddata140.while(!(IFG1&URXIFG0));//WaitforRXtofinish141.x=U0RXBUF;//Readdata142.TI_CC_CSn_PxOUT