戴尔N4050-图纸

5544332211DDCCBBAATitleSizeDocumentNumberRevDate:SheetofWistronCorporation21F,88,Sec.1,HsinTaiWuRd.,Hsichih,TaipeiHsien221,Taiwan,R.O.C.EnricoCaruso14A00CoverPageA31105Wednesday,April13,2011CoreDesignTitleSizeDocumentNumberRevDate:SheetofWistronCorporation21F,88,Sec.1,HsinTaiWuRd.,Hsichih,TaipeiHsien221,Taiwan,R.O.C.EnricoCaruso14A00CoverPageA31105Wednesday,April13,2011CoreDesignTitleSizeDocumentNumberRevDate:SheetofWistronCorporation21F,88,Sec.1,HsinTaiWuRd.,Hsichih,TaipeiHsien221,Taiwan,R.O.C.EnricoCaruso14A00CoverPageA31105Wednesday,April13,2011CoreDesignIntelPCH2011-04-07REV:A00EnricoCaruso14Muxless/UMASchematicsDocumentSandyBridgeDY:NoneInstalledUMA:UMAONLYinstalledPSL:KBC795PSLcircuitfor10mWsolutioninstalled.10mW:Externalcircuitfor10mWsolutioninstalled.DIS:MUXLESSsolutioninstalled.Surge:ForGORuralconfigstuff.GIGA:ForGIGALANconfigstuff.HDMI:ForHDMIconfigstuff.DIS_CRT:PureDISinstall5544332211DDCCBBAATitleSizeDocumentNumberRevDate:SheetofWistronCorporation21F,88,Sec.1,HsinTaiWuRd.,Hsichih,TaipeiHsien221,Taiwan,R.O.C.EnricoCaruso14A00BlockDiagram2105Wednesday,April13,2011CoreDesignA3TitleSizeDocumentNumberRevDate:SheetofWistronCorporation21F,88,Sec.1,HsinTaiWuRd.,Hsichih,TaipeiHsien221,Taiwan,R.O.C.EnricoCaruso14A00BlockDiagram2105Wednesday,April13,2011CoreDesignA3TitleSizeDocumentNumberRevDate:SheetofWistronCorporation21F,88,Sec.1,HsinTaiWuRd.,Hsichih,TaipeiHsien221,Taiwan,R.O.C.EnricoCaruso14A00BlockDiagram2105Wednesday,April13,2011CoreDesignA3INPUTSVGADCBATOUTOUTPUTSRT8208BVGA_CORE0D75V_S03D3V_AUX_S5VT1316+1314INPUTSVCC_COREOUTPUTSSYSTEMDC/DCTPS51216RDDR_VREF_S3OUTPUTSCPUDC/DCDCBATOUT1D5V_S3INPUTSTPS51125DCBATOUT5V_S5OUTPUTS3D3V_S5TPS51218OUTPUTSSYSTEMDC/DCINPUTSDCBATOUTINPUTSSYSTEMDC/DCDCBATOUT1D5V_S0OUTPUTSOUTPUTSGFXDC/DCINPUTSBQ24707INPUTSTICHARGERDCBATOUT+PBATT5V_AUX_S5+DC_IN_S5INPUTSSYSTEMDC/DC5V_S0OUTPUTS5V_S5APW7153B3D3V_S53D3V_S03D3V_S51D8V_S0DCBATOUTPCBLAYERL1:TopL2:GNDL3:SignalVCC_GFXCORE1D5V_S3VT1316+13171D8V_VGA_S0SYSTEMDC/DCSwitchesINPUTSOUTPUTS1D05V_VTT15V_S542~4445414644924793Projectcode:91.4IU01.001PCBP/N:48.4IU16.0SCRevision:10315-SCDMIx41GB/s88,89,90,9183.84,85,86,87DDRIII1066/1333IntelCPUDDRIII1066/1333ChannelASlot015144,5,6,7,8,9,10Slot1BlockDiagram(Discrete/UMAco-lay)Intel14USB2.0/1.1portsHighDefinitionAudioSATAports(6)ACPI1.1LPCI/FETHERNET(10/100/1000Mb)PCIEports(8)gDDR3900MHz512MB(64Mx16x4)4VRAM17,18,19,20,21,22,23,24,25PCIex8FDIx4x2(Discreteonly)##OnMainBoard40G9731INPUTSOUTPUTS1D5V_S31V_VGA_S0Seymou-XTS3SandyBridgeDDRIII1066/1333DDRIII1066/1333ChannelBPCHCougarPointL4:SignalL5:VCCL6:Bottom3D3V_S0APL5916INPUTS0D85V_S0OUTPUTSSYSTEMDC/DCDCBATOUT48IDT92HD87CRT24MHzHDMI588258HDMI5174MICINCRTLVDSLCD32CardReaderRealtekRTS5138SD/MMC/MS/MSProUSB2.0AzaliaCODECAZALIA2CHSPEAKER29HP1InternalAnalogMIC5049USB2.0x1PCIEx1RJ45CONNRealtekRTL8111E(GigaLAN)PCIECAMERA4982I/OboardUSBx2(Right)USB2.0x1USB2.0x2USB2.03164M/BUSBx1(Left)61USB2.0x1PCIEx159802.11a/b/gMini-CardWLAN+BT3.010/100/1000LOM100MHz2.5Gbps480Mbps33MHzLPCBus4MBFlashROM60SPISATA3GbpsSATA5656ODDHDDENEP2800PS/2PS/2ThermalKBCInt.KBNPCE795BA0DXNUVOTON28ENEP2793Fan276969TouchPADAudioboard28RealtekRTL8105E(10M/100M)1GB(128Mx16x4)gDDR3900NHzAABBCCDDEE44332211TitleSizeDocumentNumberRevDate:SheetofWistronCorporation21F,88,Sec.1,HsinTaiWuRd.,Hsichih,TaipeiHsien221,Taiwan,R.O.C.EnricoCaruso14A00TableofContentA33105Wednesday,April13,2011DN15ATIWhistlerTitleSizeDocumentNumberRevDate:SheetofWistronCorporation21F,88,Sec.1,HsinTaiWuRd.,Hsichih,TaipeiHsien221,Taiwan,R.O.C.EnricoCaruso14A00TableofContentA33105Wednesday,April13,2011DN15ATIWhistlerTitleSizeDocumentNumberRevDate:SheetofWistronCorporation21F,88,Sec.1,HsinTaiWuRd.,Hsichih,TaipeiHsien221,Taiwan,R.O.C.EnricoCaruso14A00TableofContentA33105Wednesday,April13,2011DN15ATIWhistlerPCIERoutingLANE2LANE3XWirelessLANE4LANSATATablePairSATADevice054321HDD1ODDN/AN/AN/AN/ALANE1XLANE5LANE6LANE7LANE8XXCFG[6:5]CFG[7]ProcessorStrappingCFG[2]Disabled-NoPhysicalDisplayPortattachedtoEmbeddedDisplayPort.CFG[4]PinNameStrapDescriptionConfiguration(Defaultvalueforeachbitis1unlessspecifiedotherwise)1:HuronRiverSchematicChecklistRev.0_70:PCI-ExpressStaticLaneReversalNormalOperation.LaneNumbersReversed15-0,14-1,...DefaultValuePCI-ExpressPortBifurcationStraps11:x16-Device1functions1and2disabled10:x8,x8-Device1function1enabled;function2disabled01:Reserved-(Device1function1disabled;function2enabled)00:x8,x4,x4-Device1functions1and2enabledPEGDEFERTRAINING1011:0:Enabled-AnexternalDisplayPortdeviceisconnectdtotheEMBEDDEDdisplayPort111:0:PEGTrainimmediatelyfollowingxxRESETBdeassertionPEGWaitforBIOSfortrainingSPKRNameSchematicsNotesHAD_DOCK_EN#/GPIO[33]HDA_SDOWeakinternalpull-down.Donotpullhigh.SampledatrisingedgeofRSMRST#.HDA_SYNCHuronRiverSchematicChecklistRev.0_7INIT3_3V#Weakinternalpull-up.LeaveasNoConnect.GNT3#/GPIO55GNT2#/GPIO53GNT1#/GPIO51Weakinternalpull-down.Donotpullhigh.SampledatrisingedgeofRSMRST#.GPIO8onPCHistheIntegratedClockEnablestrapandisrequiredtobepulled-downusinga1k+/-5%resistor.Whenthissignaliss