ads功率放大器设计官方指导

整理文档很辛苦,赏杯茶钱您下走!

免费阅读已结束,点击下载阅读编辑剩下 ...

阅读已结束,您可以下载文档离线阅读编辑

资源描述

ThisdocumentisownedbyAgilentTechnologies,butisnolongerkeptcurrentandmaycontainobsoleteorinaccuratereferences.Weregretanyinconveniencethismaycause.ForthelatestinformationonAgilent’slineofEEsofelectronicdesignautomation(EDA)productsandservices,pleasegoto:find/eesofAgilentEEsofEDAPowerAmplifierDesignusingADSPAWorkshopPage1WilfredoRivas-TorresTechnicalSupportApplicationEngineerOctober12,2004Outline•Introduction•DCandLoadlineanalysis•BiasandStability•LoadPull•MatchingusingSmithChartUtility•SourcePullADSPowerAmpDesignPage2•SourcePull•PACharacterization–Didwemeetthespecification?•Optimize/FineTunethedesign•TestDesignwithrealworldmodulatedsignals•LayoutWhydoweneedaPowerAmplifier?PowerAmplifiers(PA)areinthetransmittingchainofawirelesssystem.Theyarethefinalamplificationstagebeforethesignalistransmitted,andthereforemustproduceenoughoutputpowertoovercomechannellossesbetweenthetransmitterandthereceiver.ADSPowerAmpDesignPage3OSCMODBasebandPADriverBasicTransmitterPArequirements•ThePAistypicallytheprimaryconsumerofpowerinatransmitter.AmajordesignrequirementishowefficientlythePAcanconvertDCpowertoRFoutputpower.•ThedesignengineerhastooftenconcernhimselfwiththeEfficiencyofthePowerAmplifier.Noticethatefficiencytranslatesintoeitherloweroperationcost(e.g.cellularADSPowerAmpDesignPage4translatesintoeitherloweroperationcost(e.g.cellularbasestation)orlongerbatterylife(e.g.wirelesshandheld).•PAlinearityisanotherimportantrequirement,theinput/outputrelationshipmustbelineartopreservethesignalintegrity.•ThedesignofPAsofteninvolvesthetradeoffofefficiencyandlinearity.PADesignRequirement•RFOutputPower:50WPEP•InputDriveLevel:1W•OutputLoad(RL):50Ω•Efficiency(η)50%ADSPowerAmpDesignPage5•Efficiency(η)50%•BiasVoltage:28V•Device:MRF9045MDCCurvesFETCurveTracerVJFSL_MRF_MET_MODELMRF1MODEL=MRF9045MV_DCSRC1Vdc=VDSV_DCSRC2Vdc=VGSVARVAR1VGS=0VVDS=0VEqnVarI_ProbeIDSADSPowerAmpDesignPage6Setdrainandgatevoltagesweeplimitsasneeded.ParamSweepSweep1Step=0.1Stop=5.0Start=2.5SweepPlan=SwpPlan1PARAMETERSWEEPDisplayTemplatedisptemp1FET_curve_tracerTempDispFSL_TECH_INCLUDEFTIFSL_TECH_INCLUDEDCDC1Step=0.1Stop=28*2Start=0SweepVar=VDSDCDCCurves12345IDS.i,AVDsatIQLoad_LineADSPowerAmpDesignPage751015202530354045505506010VDSVDsatIQm3VDsatVDS=IDS.i=0.562VGS=3.8000000.600IQVDS=IDS.i=0.717VGS=3.80000028.000m3VDS=IDS.i=0.004VGS=2.50000033.400BiasandStabilityMRF9045M_AMPX2VDsc_mrt_MC_GRM40C0G050_J_19960828C25PART_NUM=GRM40C0G330J05033pFPortP3Num=3MLINTL20L=100milW=63.668898milSubst=MSub1MLINTL21L=100milW=63.668898milSubst=MSub1sc_mrt_MC_GRM40C0G050_D_19960828C20PART_NUM=GRM40C0G100D05010pFsc_spr_293D_A025_X9_19960828C19PART_NUM=293D474X9025A20.47uFMLINTL1L=2194.444882milW=63.670079milSubst=MSub1sc_mrt_MC_GRM40C0G050_J_19960828C8PART_NUM=GRM40C0G330J05033pFsr_avx_CR_10_K_19960828R13PART_NUM=CR10-150K15OhmPortP2Num=2ADSPowerAmpDesignPage8VGVJsr_avx_CR_10_K_19960828R12PART_NUM=CR10-680K68OhmMSUBMSub1Rough=0milTanD=0.002T=2.8milHu=3.9e+034milCond=5.8E+08Mur=1Er=4.2H=33.6milMSubFSL_MRF_MET_MODELMRF1CTH=-1RTH=-1TSNK=25MODEL=MRF9045Msc_mrt_MC_GRM40C0G050_J_19960828C17PART_NUM=GRM40C0G330J05033pFMLINTL23L=100milW=63.668898milSubst=MSub1MLINTL22L=100milW=63.668898milSubst=MSub1sc_mrt_MC_GRM40C0G050_D_19960828C23PART_NUM=GRM40C0G100D05010pFsc_spr_293D_A025_X9_19960828C24PART_NUM=293D474X9025A20.47uFPortP4Num=4sc_mrt_MC_GRM40C0G050_J_19960828C7PART_NUM=GRM40C0G330J05033pFsc_mrt_MC_GRM40C0G050_J_19960828C3PART_NUM=GRM40C0G330J05033pFsl_tok_LL2012-F_J_19960828L2PART_NUM=LL2012-F82NJ82nHPortP1Num=1StabilityAnalysisVDDVGGMRF9045M_AMPX1S-PARAMETERSFSL_TECH_INCLUDEP_1TonePORT1Freq=fssP=polar(dbmtow(-60),0)Z=50OhmNum=1TermR3Z=50OhmNum=2ADSPowerAmpDesignPage9VGGVDDS_ParamSP2Step=1.0MHzStop=3000MHzStart=1MHzI_ProbeIDDI_ProbeIGGV_DCSRC2Vdc=VGSV_DCSRC1Vdc=VDSVARVAR3VGS=3.8VVDS=28VEqnVarFSL_TECH_INCLUDEFTIMuPrimeMuPrime1MuPrime1=mu_prime(S)MuPrimeMuMu1Mu1=mu(S)MuStabMeasStabMeas1StabMeas1=stab_meas(S)StabMeasStabFactStabFact1StabFact1=stab_fact(S)StabFactStabilityAnalysis1E21E31E43E4StabFact1ADSPowerAmpDesignPage100.51.01.52.02.50.03.01E11E21freq,GHzStabFact1ImpedanceMatching•Theneedformatchingcircuitsisbecauseamplifiers,inordertoperforminacertainway(e.g.maximizeoutputpower),mustbepresentedwithacertainimpedanceatboththeloadandthesourceports.•ForexampleinordertodelivermaximumpowertotheloadRLthetransistormusthaveterminationZsandZL.ADSPowerAmpDesignPage11transistormusthaveterminationZsandZL.•TheinputmatchingnetworkisdesignedtotransformthegeneratorimpedanceRstotheoptimumsourceimpedanceZs.•TheoutputmatchingnetworktransformtheloadterminationRL(50Ω)totheoptimumloadimpedanceZL.•ALoadPullmeasurementwillhelpthedesignerdeterminetheoptimumloadimpedanceZL.LoadPullSetupvloadVs_highParamSweepSweep2PARAMETERSWEEPHarmonicBalanceHB1Order[1]=15Freq[1]=RFfreqHARMONICBALANCEP_1ToneMRF9045M_AMPI_ProbeIloadI_ProbeIs_highS1P_EqnV_DCSRC1Vdc=VhighADSPowerAmpDesignPage12Vs_lowSetthesevalues:SetLoadandSourceimpedancesatharmonicfrequenciesVARSweepEquationsZ0=50pts=100s11_center=-0.6+j*0.1s11_rho=0.75EqnVarF

1 / 51
下载文档,编辑使用

©2015-2020 m.777doc.com 三七文档.

备案号:鲁ICP备2024069028号-1 客服联系 QQ:2149211541

×
保存成功