基于FPGA的千兆以太网设计

摘要摘要随着信息技术的快速发展，以太网嵌入式设备的应用越来越广泛。为了让以太网各设备之间能公平有效地共享通信媒介，对以太网MAC层数据处理系统的研究显得尤为重要。为此，本文首先分析了以太网及其相关协议的基本内涵，解剖了以太网MAC层通信机制、帧的特性与格式、PHY接口协议、ARP协议以及I2C协议。同时通过对FPGA芯片的了解，确定了基于88E1111芯片和XC3S400FPGA芯片相结合的系统设计方案，支持1000Base-T标准以太网的接入，完成了系统的硬件电路设计。系统设计中，88E1111完成PHY层数据的处理，FPGA则完成MAC层数据的处理，主要包含接收MAC数据帧的校验和解封、待发送数据帧的封装、MAC地址滤波、IP数据包的提取、ARP地址映射等，是系统的核心。在FPGA设计中，遵循自上而下的设计思想，对顶层模块以及PHY接口、MAC核心处理、用户配置、用户数据各功能子模块依次进行设计。关键词：以太网MAC层FPGAABSTRACTABSTRACTWiththerapiddevelopmentofIT,theembeddeddevicesofaccessingtoEthernetareusedmoreandmorewidely.Inordertomakeeachdeviceenjoyafairandeffectivesharedcommunicationsmedium,itisparticularlyimportanttoresearchthedataprocessingsystemoftheEthernetMAClayer.Tothisend,itisfirstlydonetoanalyzethebasicconnotationofEthernetandtherelatedagreements,andtodissectthecommunicationmechanismsoftheEthernetMAClayer,thecharacteristicsandformatoftheframe,thePHYinterfaceprotocol,theARPprotocol,I2Cprotocolinthepaper.AccordingtothecharacteristicsandworkingprincipleoftheFPGAchip,thesystemdesign,whichsupportstheaccessingofthe1000Base-TEthernet,isdeterminedbasedonthecombinationofthe88E1111PHYchipandXC3S400-4fg456CFPGAchipofXilinx.ThenthehardwarecircuitdesignisaccomplishedbytheCadencedevelopmenttool.Inthissystem,88E1111andFPGArespectivelycompletesthedataprocessingofPHYlayerandthedataprocessingoftheMAClayer,whichmainlyconsistsofthecalibrationanddearchiveofthereceivingdataframes,theencapsulationofthedataframes,theMACaddressfiltering,theextractionoftheIPpacket,TheARPaddressmapping,andsoon.SoFPGAisthecoreofthesystem.Followingthetop-downdesignconception,thedesignofFPGAsuccessivelyincludesthetop-levelmodule,andthesubmoduleofthePHYinterface,theMACcoreprocessing,theuserconfiguration,theuserdatainterface.Keywords:EthernettheMAClayerFPGA目录i目录第一章绪论........................................................................................................11.1研究背景及意义.....................................................................................11.2国内外研究现状.....................................................................................21.3论文内容和论文组织结构安排.............................................................3第二章千兆以太网理论基础............................................................................52.1千兆以太网标准.....................................................................................52.2介质访问控制（MAC）........................................................................72.2.1半双工MAC..............................................................................72.2.2全双工MAC..............................................................................92.3介质无关接口（MII）.........................................................................102.3.1GMII接口信号定义.................................................................112.3.2GMII接口时序特性.................................................................142.3.3GMII的管理MDIO接口.........................................................152.4物理层技术...........................................................................................172.5TCP/IP协议栈.......................................................................................18第三章以太网数据传输硬件设计实现..........................................................213.1系统方案设计.......................................................................................213.1.1设计思想...................................................................................213.1.2系统功能...................................................................................213.1.3系统总体结构设计...................................................................223.2芯片的选取...........................................................................................233.2.1物理层芯片选择.......................................................................233.2.2FPGA主芯片选择....................................................................253.3硬件电路设计.......................................................................................263.3.1以太网变换电路设计...............................................................26第四章FPGA软件设计与仿真......................................................................33ii目录4.1FPGA软件开发简介............................................................................334.2系统顶层模块设计..............................................................................344.3PHY接口模块设计..............................................................................384.3.1设计思想..................................................................................384.3.2相关算法..................................................................................394.3.3功能仿真..................................................................................404.4MAC核心处理模块设计.....................................................................414.5实验测试与结果..................................................................................424.5.1硬件测试平台准备..................................................................424.5.2软件测试平台准备..................................................................434.5.3系统