RTL8201BL

RTL8201BL2002-03-29Rev.1.21REALTEKSINGLECHIPSINGLEPORT10/100MFASTETHERNETPHYCEIVERRTL8201BL1.Features...........................................................................22.GeneralDescription.......................................................23.BlockDiagram................................................................34.PinAssignments.............................................................45.PinDescription...............................................................55.1100MbpsMII&PCSInterface................................55.2SNI(SerialNetworkInterface):10Mbpsonly..........55.3ClockInterface..........................................................65.4100MbpsNetworkInterface......................................65.5DeviceConfigurationInterface.................................65.6LEDInterface/PHYAddressConfig.........................75.7Resetandotherpins..................................................75.8PowerandGroundpins.............................................76.RegisterDescriptions.....................................................86.1Register0BasicModeControlRegister...................86.2Register1BasicModeStatusRegister.....................96.3.Register2PHYIdentifierRegister1.......................96.4.Register3PHYIdentifierRegister2.......................96.5.Register4Auto-negotiationAdvertisementRegister(ANAR)...........................................................106.6Register5Auto-NegotiationLinkPartnerAbilityRegister(ANLPAR).......................................................106.7Register6Auto-negotiationExpansionRegister(ANER)............................................................116.8Register16NwaySetupRegister(NSR).................116.9Register17Loopback,Bypass,ReceiverErrorMaskRegister(LBREMR)......................................................126.10Register18RX_ERCounter(REC).......................126.11Register1910MbpsNetworkInterfaceConfigurationRegister...126.12Register20PHY1_1Register..............................136.13Register21PHY1_2Register..............................136.14Register22PHY2Register..................................136.15Register23Twister_1Register.............................136.16Register24Twister_2Register.............................136.17Register25TestRegister.......................................137.FunctionalDescription................................................147.1MIIandManagementInterface...............................147.1.1DataTransition................................................147.1.2SerialManagement..........................................147.2Auto-negotiationandParallelDetection.................157.3Flowcontrolsupport...............................................167.4HardwareConfigurationandAuto-negotiation.................167.5LEDandPHYAddressConfiguration....................177.6SerialNetworkInterface.........................................177.7PowerDown,LinkDown,PowerSaving,andIsolationModes...187.8MediaInterface.......................................................187.8.1100BaseTX.....................................................187.8.2100Base-FXFiberModeOperation................187.8.310BaseTx/Rx..................................................197.9RepeaterModeOperation.......................................197.10Reset,andTransmitBias(RTSET)........................197.113.3Vpowersupplyandvoltageconversioncircuit197.12FarEndFaultIndication(FEFI)............................208.ElectricalCharacteristics............................................218.1D.C.Characteristics................................................218.1.1.AbsoluteMaximumRatings...........................218.1.2.OperatingConditions.....................................218.1.3.PowerDissipation...........................................218.1.4SupplyVoltage:Vcc........................................218.2A.C.Characteristics................................................228.2.1MIITimingofTransmissionCycle.................228.2.2MIITimingofReceptionCycle......................238.2.3SNITimingofTransmissionCycle.................248.2.4SNITimingofReceptionCycle......................258.2.5MDC/MDIOtiming.........................................268.2.6TransmissionWithoutCollision......................268.2.7ReceptionWithoutError.................................268.3CrystalandTransformerSpecifications..................278.3.1CrystalSpecifications......................................278.3.2TransformerSpecifications..............................279.MechanicalDimensions...............................................2810.RevisionHistory.........................................................29RTL8201BL2002-03-29Rev.1.221.FeaturesTheRealtekRTL8201BLisaFastEthernetPhyceiverwithselectableMIIorSNIinterfacetotheMACchip.Itprovidesthefollowingfeatures:SupportsMII/7-wireSNI(SerialNetworkInterface)interfaceSupports10/100MbpsoperationSupportshalf/fullduplexoperationSupportoftwistedpairorFibermodeoutputIEEE802.3/802.3ucompliantSupportsIEEE802.3uclaus