HMD16M72D9A-F13中文资料

HANBitHSD16M72D9AURL:(August.2002)GENERALDESCRIPTIONTheHSD16M72D9Aisa16Mx72bitSynchronousDynamicRAMhighdensitymemorymodule.ThemoduleconsistsofnineCMOS4Mx8bitwith4banksSynchronousDRAMsinTSOP-II400milpackagesona168-pinglass-epoxysubstrate.Two0.33uFdecouplingcapacitorsaremountedontheprintedcircuitboardinparallelforeachSDRAM.TheHSD16M72D9AisaDIMM(DualinlineMemoryModule)andisintendedformountinginto168-pinedgeconnectorsockets.Synchronousdesignallowsprecisecyclecontrolwiththeuseofsystemclock.I/Otransactionsarepossibleoneveryclockcycle.Rangeofoperatingfrequencies,programmablelatenciesallowsthesamedevicetobeusefulforavarietyofhighbandwidth,highperformancememorysystemapplicationsAllmodulecomponentsmaybepoweredfromasingle3.3VDCpowersupplyandallinputsandoutputsareLVTTL-compatible.FEATURES•PartIdentificationHSD16M72D9A-F/10L:100MHz(CL=3)HSD16M72D9A-F/10:100MHz(CL=2)HSD16M72D9A-F/13:133MHz(CL=3)HSD16M72D9A-F/12:125MHz(CL=3)FmeansAuto&SelfrefreshwithLow-Power(3.3V)•Burstmodeoperation•Auto&selfrefreshcapability(4096Cycles/64ms)•LVTTLcompatibleinputsandoutputs•Single3.3V±0.3Vpowersupply•MRScyclewithaddresskeyprograms-Latency(Accessfromcolumnaddress)-Burstlength(1,2,4,8&Fullpage)-Datascramble(Sequential&Interleave)•Allinputsaresampledatthepositivegoingedgeofthesystemclock•Theuseddeviceis4Mx8bitx4BanksSDRAMSynchronousDRAMModule128Mbyte(8Mx72bit),DIMMwithECCbasedon16Mx8,4Banks,4KRef.,3.3VPartNo.HSD16M72D9AHANBitHSD16M72D9AURL:(August.2002)PINASSIGNMENTPINSymbolPINSymbolPINSymbolPINSymbolPINSymbolPINSymbol1Vss29DQM157DQ1885Vss113DQM5141DQ502DQ030/CS058DQ1986DQ32114NC142DQ513DQ131NC59Vcc87DQ33115/RAS143Vcc4DQ232Vss60DQ2088DQ34116Vss144DQ525DQ333A061NC89DQ35117A1145NC6Vcc34A262NC90Vcc118A3146NC7DQ435A463NC91DQ36119A5147NC8DQ536A664Vss92DQ37120A7148Vss9DQ637A865DQ2193DQ38121A9149DQ5310DQ738A1066DQ2294DQ39122BA0150DQ5411DQ839BA167DQ2395DQ40123A11151DQ5512Vss40Vcc68Vss96Vss124Vcc152Vss13DQ941Vcc69DQ2497DQ41125CLK1153DQ5614DQ1042CLK070DQ2598DQ42126NC154DQ5715DQ1143Vss71DQ2699DQ43127Vss155DQ5816DQ1244NC72DQ27100DQ44128CKE0156DQ5917DQ1345/CS273Vcc101DQ45129NC157Vcc18Vcc46DQM274DQ28102Vcc130DQM6158DQ6019DQ1447DQM375DQ29103DQ46131DQM7159DQ6120DQ1548NC76DQ30104DQ47132NC160DQ6221CB049Vcc77DQ31105CB4133Vcc161DQ6322CB150NC78Vss106CB5134NC162Vss23Vss51NC79CLK2107Vss135NC163CLK324NC52CB280NC108NC136CB6164NC25NC53CB381WP109NC137CB7165SA026Vcc54Vss82SDA110Vcc138Vss166SA127/WE55DQ1683SCL111/CAS139DQ48167SA228DQM056DQ1784Vcc112DQM4140DQ49168VccHANBitHSD16M72D9AURL:(August.2002)FUNCTIONALBLOCKDIAGRAMCKECLKCASDQ0-7RASDQM0CEWEA0-A11BA0-1U1/CAS/CS0/RAS/CS2CKE0DQM0DQM7CLKBCLKACKECLKCASDQ16-23RASDQM2CEWEA0-A11BA0-1CKECLKCASDQ32-39RASDQM4CEWEA0-A11BA0-1CKECLKCASDQ48-55RASDQM6CEWEA0-A11BA0-1CKECLKCASDQ8-15RASDQM1CEWEA0-A11BA0-1CKECLKCASDQ24-31RASDQM3CEWEA0-A11BA0-1CKECLKCASDQ40-47RASDQM5CEWEA0-A11BA0-1CKECLKCASDQ56-63RASDQM7CEWEA0-A11BA0-1DQM2DQM6DQM4DQM1DQM3DQM5U6U7U3U8U4U9U2VccVssTwo0.1uFCapacitorspereachSDRAM/WEA0-A11BA0-1DQ0-63CKECLKCASCB0-7RASDQM7CEWEA0-A11BA0-1DQM1CB0-7HANBitHSD16M72D9AURL:(August.2002)PINFUNCTIONDESCRIPTIONPinNameInputFunctionCLKSystemclockActiveonthepositivegoingedgetosampleallinputs./CEChipenableDisablesorenablesdeviceoperationbymaskingorenablingallinputsexceptCLK,CKEandDQMCKEClockenableMaskssystemclocktofreezeoperationfromthenextclockcycle.CKEshouldbeenabledatleastonecyclepriortonewcommand.Disableinputbuffersforpowerdowninstandby.CKEshouldbeenabled1CLK+tSSpriortovalidcommand.A0~A11AddressRow/columnaddressesaremultiplexedonthesamepins.Rowaddress:RA0~RA11,Columnaddress:CA0~CA9BA0~BA1BankselectaddressSelectsbanktobeactivatedduringrowaddresslatchtime.Selectsbankforread/writeduringcolumnaddresslatchtime./RASRowaddressstrobeLatchesrowaddressesonthepositivegoingedgeoftheCLKwithRASlow.Enablesrowaccess&precharge./CASColumnaddressstrobeLatchescolumnaddressesonthepositivegoingedgeoftheCLKwithCASlow.Enablescolumnaccess./WEWriteenableEnableswriteoperationandrowprecharge.LatchesdatainstartingfromCAS,WEactive.DQM0~7Datainput/outputmaskMakesdataoutputHi-Z,tSHZaftertheclockandmaskstheoutput.BlocksdatainputwhenDQMactive.(Bytemasking)DQ0~63Datainput/outputDatainputs/outputsaremultiplexedonthesamepins.VDD/VSSPowersupply/groundPowerandgroundfortheinputbuffersandthecorelogic.ABSOLUTEMAXIMUMRATINGSPARAMETERSYMBOLRATINGVoltageonAnyPinRelativetoVssVIN,OUT-1Vto4.6VVoltageonVccSupplyRelativetoVssVcc-1Vto4.6VPowerDissipationPD9WStorageTemperatureTSTG-55oCto150oCShortCircuitOutputCurrentIOS250mANotes:PermanentdevicedamagemayoccurifAbsoluteMaximumRatingsareexceeded.Functionaloperationshouldberestrictedtotheconditionsasdetailedintheoperationalsectionsofthisdatasheet.Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectdevicereliability.HANBitHSD16M72D9AURL:(August.2002)DCOPERATINGCONDITIONS(Recommendedoperati