PCB设计仿真工具-HyperLynx入门指南

HyperLynxHyperLynxLineSimLineSimBoardSimBoardSimBoardSimBoardSimBoardSimGHzIBISDatabookHyperLynxBoardSimLineSimPCBBoardSimLineSimZ0Z0=(L/C)Z0Z0Refl.%=(ZL-Z0)/(ZL+Z0)PCB5nsHyperLynxZLLineSimNewLineSimSchematicLineSimFile-NewLineSimFile…EditPCBStackupEdit-Stackup…6BasicDielectricMetalZ0PlanningCustomViewStackupEditor68InsertBelowSolidPlaneGND2LayerNameVCC2HyperLynxHyperLynxLineSimPCBEMCLineSimPCBLineSimwhat-ifEMCLineSimHyperLynxV7.0LineSim•PCB•PCB6OKHyperLynxLineSimLineSimIC•LineSimIC•ICICLineSimICCELLA0B0ICCELLA0ICAssignModelsSelect…Generic.modDevices74AC11X:LINE-DRV74ACHyperLynxOKBufferSettingOutputPinsU(B0)Select…Generic.mod74HCXX:GATE-2OKInputValuesTransmission-LineTypeValuesHyperLynxWhat-ifMicrostrip8Incheswhat-ifOpenoscilloscope/SimulatorStartSimulationHyperLynxICCopytoClip---MicrosoftOfficeWordCtrl-vOSCILLOSCOPEDesignfile:UNNAMED0.TLNDesigner:XCMBoardSim/LineSim,HyperLynxDate:WednesdayMar.24,2004Time:17:04:30ShowLatestWaveform=YES,ShowPreviousWaveform=YES-8.000-6.000-4.000-2.0000.0002.0004.0006.0008.00010.00012.0000.0005.00010.00015.00020.00025.00030.00035.00040.00045.00050.000Time(ns)Voltage-V-Probe1:U(A0)Probe2:U(B0)HyperLynx8Inches3T1.TechnologyIC2.Topology3.TerminationZ0TechnologyCMOS1.9nsTopology1/6FR-45.8in/ns6in/nsEdit-DatabookICModels.MODLibraryandModelModelLibrarygeneric.modDeviceModel74AC11X:Line-DrvOutputDriversSlewTime/HyperLynxSlewTime6Inches=SlewRate(ns)6(in/ns)=1.9(ns)6(in/ns)=11.4in1/61.9inFR-4SlewTimens6x1/6=1ValuesLength1.9Inches0.5inchesPCBT8-inchValuesLength8InchesStartSimulationHyperLynxRt=Z0-ZdRt=Z0=Zd=Z0LineSimICResistor63StartSimulationHyperLynxShowPreviousresultEMIEMILineSimspectrumanalyzerVerticalOffsetClassAClassBStartSimulationHyperLynxFCCCISPRClassBCloseValues4InchesStartSimulation133MHzFCCCISPRClassB10EMIWhat-if4InchesCISPREMCHyperLynx133MHzICPCBLineSimBoardSimPCBICSelectEASY.MOD“CMOS,3.3V,Ultra-Fast,”OKNoneValues20InchesStartSimulationShowPreviousResultsStartSimulationHyperLynxICMulti-GigabitPCIExpressHyperTransportXTKWLineSimBoardSimHyperLynxFrequencyDomainLossResistiveDielectric480MHzHyperLynxHSPICEIBISICmulti-gigabit“3GIO”ICHSPICESPICELynxLineSimBoardSimHSPICEHSPICEHyperLynxHSPICEHSPICE3GIOHSPICEHyperLynxHSPICEIBISHSPICEOptions/DirectoriesICHyperLynx\Libs\SpiceSPICEICICSelectSPICESPICE.incHyperLynxSPICEOKspreadsheetSPICE“ports”PortsPortsVCCXGNDLineSimSPICEportLineSimVinStimulusSPICEportA0VoutUA0HSPICEIBISPortsHSPICEHSPICEPCHSPICEStartSimulationLineSimHSPICEHyperLynxHSPICEOKHSPICEOKSPICEHSPICEHSPICELineSimHSPICEHSPICEHyperLynxLineSimHSPICELineSimHSPICEHyperLynxHSPICEHSPICEHyperLynxLineSimLineSim200mVLineSim163264HyperLynxDemoHYPFILESXTTraceSeparation.TLNLineSimLineSimCELL:A0B0ICCoupledStackupAddtoCouplingRegionsNewCouplingEditcouplingRegionLayer3,Signal,InnerSignal1AutoZoomTransmission-LineTypeCommentAggressor1Coupling0001Victim[TLA1,B1]Aggressor2[TLA2,B2]Couplingregion3inches6.0mils8.0milsHyperLynxNameGenericBusExample12.0inchesTransmission-LineTypeCouplingDirectionLineSimHintsICICICICCELL:A0ICAssignModelsSelect…SelectICModelEASY.MODHyperLynxCMOS,3.3V,FASTOKVcc3.3VYesAssignModelsCopyPasteAllIC“CMOS,3.3V,FAST”ICAssignModelsInputBufferSettingU(A0)U(A2)OutputICICU(A0)U(A2)AssignModelsU(A0)Select…CMOS3.3Vultra-fastAggressor1Aggressor2AssignModelsPinsU(A1)BufferSettingsStuckLow0StuckLowHyperLynxVictimAggressorICStuckLowVictimAggressorsVictimICVictimsAggressorsLineSimvictimaggressorAggressorsVictimsAggressorVictimLineSimLineSimcoupledstackupLineSim•stripline•6mils8mils•12inchesHyperLynx200mVEditCouplingRegionsOpenoscilloscope/SimulatorSimulate-RunScope…DriverWaveformEdgeFallingEdgeICTypicalStartSimulationCopytoClipLineSimboundary-elementfieldsolverVictimCMOS700mV200mVU(A1)740mV970mVVictimFieldSolverStartHyperLynxView…8mils16milsEditTransmission-lineEditCouplingRegionsCouplingRegionTL(A1:B1),‘Victim’Trace-to-TraceSeparationLeftRight16StartSimulationPCBPCB10mils5milsEditStackup…StackupEditorVCCInner1Thickness105GNDInner2Thickness1055milsOKStartSimulationPreviousResultHyperLynxOSCILLOSCOPEDesignfile:XTTRACESEPARATION.TLNDesigner:XCMBoardSim/LineSim,HyperLynxDate:TuesdayMar.16,2004Time:13:35:52ShowLatestWaveform=YES-600.0-400.0-200.0-0.0200.0400.0600.0800.01000.01200.00.0005.00010.00015.00020.00025.00030.00035.00040.00045.00050.000Time(ns)Voltage-mV-Probe5:U(B1)Victim200mVVerticalScale200mV/divICPCBLineSimAggressorAggressor1Aggressor2OpenTerminatorWizardU(A0)OKApplyTolerance10percentAggressor139OhmOKU(A0)ResistorResistance56Aggressor2U(A2)HyperLynx100mV/divPreviousResult60mVOSCILLOSCOPEDesignfile:XTTRACESEPARATION.TLNDesigner:XCMBoardSim/LineSim,HyperLynxDate:TuesdayMar.16,2004Time:14:10:12ShowLatestWaveform=YES-300.0-200.0-100.0-0.0100.0200.0300.0400.0500.0600.00.0005.00010.00015.00020.00025.00030.00035.00040.00045.00050.000Time(ns)Voltage-mV-Probe5:U(B1)VictimVictim1nsVictimAgressor39OhmsU(A1)StuckLowOutputU(A1)U(B1)LineSim16milsHyperLynxBoardSimBoardSimclkdemo.hypclkBoardSimBoardSimclkEMCclkSelectNetbyNameSelectNetbyNameclkPCBclkHyperLynxSortNetsByNameBoardPCBclkICAC