StructuresandProcessesofSelf-AlignedDouble-GateMOSFETsQIANLi,LIWeihua(Microelectronicscenter,SoutheastUniversity,Nanjing,210096P.R.China)Abstract: Double-gateMOSFETisconsideredthemostpromisingcandidateforsub50nmMOSFETdesign,whichof-ferssuperiorsubthresholdslope,bettershortchannelcontrol,andhighermobility.Self-aligneddouble-gatedevicestruc-tureisproposedtoaccommodatethekeyfeaturesoftheidealdouble-gateMOSFET.Inthispaper,wepresentseveralkindsofself-aligneddouble-gateMOSFETstructuresandtheirprocessflows.Keywords: Self-Alignedgates;Double-GateMOSFETsEEACC: 2570D 2570FMOSFET①钱 莉,李伟华(MEMS, 210096):MOSFET,、、。MOSFET,,。MOSFET。:;MOSFET :TN4 :A :1005-9490(2002)03-0287-051 CMOS,,。,,,、DIBL,CMOS[1]。。MOSFET。图1 基本的双栅MOSFET结构示意图MOSFET(1)、,。,,,。,,MOSFET、、[2]。MOSFET,、[3]。、,,,。、,MOSFET。,MOSFET。MOSFET。25320029 ChineseJournalofElectronDevices Vol.25,No.3Sep.,2002①:2002-04-172 MOSFET2.1 MOSFET[4],,、。、,,,2(e)。(2):(1) SOI,,(LTO),(CMP),(2(a))。(2) ,LTO,,。,。,(2(b))。(3) ,、,LTO,、(2(c))。(4) 、,,(2(d))。(5) ,。,(2(e))。,。(6) 。2.2 MOSFET[5],MOSFET,,。,,。,3(f)。(3):(1) n+,图2 横向选择外延制备源漏区的自对准双栅MOSFET的工艺流程,(PSG)、、、、、(3(a))。(2) n+,288 电子器件 第25卷图3 垂直沟道的自对准双栅MOSFET的工艺流程。,,(3(b))。(3) ,CMP,,,n+,(3(c))。(4) ,PSG。,。(3(d))。(5) PSG,,(3(e))。(6) ,,(3(f)),。(Lg)。(7) 。2.3 FinFET[6,7]FinFET(6(d))MOSFET,,,,4(f)。(4):(1) SOI,,(4(a))。(2) ,()(4(b))。(3) SiGeLTO(4(c))。SiGeSi,PSiGePSi,SiGe。(4) LTOSiGe,(4(d))。(5) LPCVD,,(4(e))。(6) ,。,,P+。,(289第3期 钱 莉,李伟华:自对准双栅MOSFET的结构与工艺实现 图4 FinFET结构的工艺流程4(f))。(7) 。2.4 MOSFET[8],,α-Si,,、。(MILC),α-Si,,5(d))。(5):图5 通过凹槽来实现自对准的双栅MOSFET工艺流程(1) ,LTO,,,,,,α-Si,CMPα-Si,(5(a))。(2) H3PO4SiO2,(5(b))。(3) LPCVDα-Si。,,α-Si,290 电子器件 第25卷,,,(5(c))。(4) (MILC),α-Si,。,,,CMP。、(5(d))。(5) 。3 MOSFETMOSFET,、、。、MOSFETMOSFET。MOSFET。[1] H.-S.PhilipWong,BeyondtheConventionalMOSFET,ESSDERC2001.[2] ,。MOSFET[J]。,2001305,290~293[3] Hon-SumPhilipWong,KevinK,Chan,etal.Self-Aligned(TopandBottom)Double-GateMOSFETwitha25nmThickSiliconChannel[J].IEDMTechDig,1997;427~430[4] Jong-HoLee,Young-JunePark,etal.SuperSelf-AlignedDouble-Gate(SSDG)MOSFETsUtilizingOxidationRateDif-ferenceandSelectiveEpitaxy[J].IEDMTechDig,1999;71~74[5] HergenrotherJM,MonroeD,etal.TheVerticalReplace-ment-Gate(VRG)MOSFET:A50-nmVerticalMOSFETwithLithography-IndependentGateLength[J].IEDMTech.Dig,1999;75~78[6] XuejueHuang,Wen-ChinLee,etal.Sub50-nmFinFET:PMOS[J].IEDMTechDig,1999;67~70[7] XuejueHuang,Wen-ChinLee,etal.Sub-50nmP-ChannelFinFET[J].IEEETransactionsonElectronDevices,2001;48[5]:880~886[8] ShengdongZhang,MansunChan,etal.Fabricationandpropertiesofself-aligneddouble-gatepoly-SiTFT[J].Solid-StateandIntegrated-CircuitTechnology,2001;1442~1445[9] ErinC.Jones,MeikeiIeong,etal.HighPerformanceofPlanarDoubleGateMOSFETswithBackgateDielectrics[C].In:DeviceResearchConference,2001;28~29[10] MoersJ,TrellenkampS,etal.VerticalDouble-GateMOS-FETbasedonepitaxialgrowthbyLPCVD.ESSDERC2001[11] TaichiSu,JohnPDentonetal.NewPlanarSelf-AlignedDouble-GateFully-DepletedP-MOSFET′sUsingEpitaxialLateralOvergrowth(ELO)andSelectivelyGrownSourceDrain[C].In:2000IEEEInternationalSOIConference,110~111[12] XinnanLin,ChugangFeng,etal.Double-GateSOIMOS-FETFabricationfromBulkSiliconWafer[C].In:2001IEEEInternationalSOIConference,93~94 (1978-01),2000,,SOI。291第3期 钱 莉,李伟华:自对准双栅MOSFET的结构与工艺实现