LDMOS_SOA_Considerations

SHORTANDLONG-TERMSAFEOPERATINGAREACONSIDERATIONSINLDMOSTRANSISTORSPhilipLHowerandSameerPendharkar*Mixed-SignalTechnologyDevelopmentTexasInstrumentsManchester,NH03101,and*Dallas,TX75321,USA[Keywords:LDMOS,SOA,hotcarrierlifetime,thermalinstability,WLR,ESD,CHClifetime,thermalSOA,electricalSOA]INTRODUCTIONLateralDMOStransistorsarewidelyusedinmixed-signalICcircuitdesigns,particularlywherepowerhandlingisimportant.Bothhigh-voltage(20to100V)andhighcurrent(2to3A)outputdriversarerequiredforapplicationswithintheautomotive,papermedia,digitalaudio,andothermarkets.ThispaperviewstheLDMOSfromapower-handlingperspective,consideringbothdesignandcharacterizationaspects.SafeoperatingarearegimesIndesigningandusingtheLDMOS,particularattentionmustbepaidtotheelectricalstressplacedonthiscomponent.Ifthestressexceedscertainlimits,thedeviceislikelytofail.Thephrase“safeoperatingarea”orSOAisusedtodefinetheboundariesthatlimitthedeviceoperatingpointtoconditionsthatpreventdevicefailure.Becausedevicescanbestressedinavarietyofways,SOAdefinitionisnotstraightforward.TohelpwithSOAdetermination,itmakessensetodefinenotone,butseveralsafeoperatingareas,distinguishingthemmainlybythedurationtimeoftheelectricalstress.ThreedifferentSOAsareindicatedintheplotofFigure1,whichshowsstresstimeasthehorizontalaxis.ElectricalandthermalSOAstypicallydealwithstresstimeslessthanafewms,thatis,theirboundariesaredeterminedby“short-term”testing.Alternatively,hotcarrierstressteststypicallyrequiretimesfromafewhundredtoseveralthousandsecondsandarelabeled“long-term.”Animportantpointisthatthemaximumallowedpowerdensity,shownastheverticalaxisinFigure1,dependsonstresstimeandhasthegeneralshapeindicatedinFigure1.stresstime(s)P/A(W/cm2)10-910-3103106104102ESDCDMHBMenduseapplicationsHCstresse-SOAth-SOAHCstressSOAlimitingpowerdensity(typicaloutputdriver)short-termlong-term(e-SOAforsmalldevices)stresstime(s)P/A(W/cm2)10-910-310310-910-310310-910-3103106104102ESDCDMHBMenduseapplicationsHCstresse-SOAth-SOAHCstressSOAlimitingpowerdensity(typicaloutputdriver)short-termlong-term(e-SOAforsmalldevices)FIGURE1.MAXIMUMPOWERDENSITYVS.STRESSTIMEFORATYPICALLDMOS,SHOWINGVARIOUSSOAREGIMES.Short-termvs.long-termSOAShort-termSOAregimescanbelinkedtotwodifferentcarriergenerationprocessesthattriggercatastrophicdevicefailure[1].Bothimpactionizationandthermalgenerationcancreate“excess”carrierswithinthedevice.Thecarriersarelabeledexcessbecausetheyprovidecurrentsthatarenotundergatecontrol.Iftheseexcesscurrentsreachlevelscomparabletothecurrentbeingcontrolledbythegate,instabilityanddevicefailurecanoccur.Ratherthandetectingcatastrophicdevicefailure,hotcarrierstresstestsmonitordegradationofsomefundamentaldeviceparameter,forexample,on-resistance,Rdson,orthresholdvoltage.Thedegradationisassociatedwithtrappingofimpactgeneratedcarriersattheoxide/Siinterfaceunderthegateorwithinthedriftregion[2],[3],[4].ImpactionizationdominateselectricalandHCstresssafeoperatingareasandcanplayasecondaryroleinthermalSOA.ThermalgenerationismainlyassociatedwiththermalSOA.HIGH-VOLTAGEMOSTRANSISTORSConventionalMOStransistorsaregenerallynotusefulforprocessingpower.Theyaredesignedinsteadtoprocessinformation(bits)usingminimuminputenergywhileoccupyingtheleastarea.Gatelengthsareminimizedasisgateoxidethickness.Figure2showsasimplifiedcross-sectionofaconventionalNMOStransistor.GATEn+n+p-regionSDGATEn+n+p-regionSDFIGURE2.NMOSCROSS-SECTIONWITHAPPLIEDVDSANDWITHVGS=0.THEDRAINDEPLETIONLAYERISINDICATEDBYTHEDASHEDLINES.Maximumdrainvoltageislimitedbygateoxidebreakdownaswellasbythecombinedeffectsofpunch-throughandavalanchebreakdownfromdrain-to-source.CMOStechnologiescurrentlyhavemaximumdrainvoltagesmovingintothe1to2Vrange.ThismeansthatchangesneedtobemadetoconventionalNMOSandPMOSgeometriesiftheyaretohandlepower.2ExtendingthedrainByinterposingalightly-dopedn-typegapbetweendrainandgate,thedrainvoltagecanbeincreased.Theideaistoavoidexceedingthesiliconcriticalelectricfield,Ecrit,whileincreasingdrain-gatedistancejustenoughtoreachtherequiredvoltage.Ecritrangesfrom10to30V/µmanddependsonhowwellparasiticnpnactionissuppressed[1].Figure3illustratesa“drainextended”NMOSorDENMOS.Inmanycases,thepositivechargeinthedepletedn-regioncanbebalancedbythenegativechargeinthep-layerunderneath.Withthisapproach,“RESURF”(reducedsurfacefield)[5],[6]actionbecomespossible.Theelectricfieldbecomesnearlyhorizontalandfairlyuniformalongthelow-dopedregion.Bymaintainingchargebalanceandusingtheappropriateverticalprofiles,themaximumVdscanbeincreasedsimplybyincreasingthelengthofthelow-dopedregion.OnenegativeconsequenceofthisapproachisincreasedRdson.ThedrainNwellcanusuallybeusedtoprovidethedrainextension,butinsomecasesanextramaskmaybeneeded.GATEn+p-regionDn+n-(lowdoped)appliedhighvoltage(Vds)lowvoltagedrainextensionGATEn+p-regionDn+n-(lowdoped)appliedhighvoltage(Vds)lowvoltagedrainextensionFIGURE3.DRAIN-EXTENDEDNMOS(DENMOS)CROSS-SECTION.THEENTIRELOW-DOPEDREGIONISDEPLETED.TheLateralDMOSOnedifficultywiththeDENMOSisthatthegatelengthneedstobefairlylongtoavoidpunchthrough.Thisisduetotherelativelylightd