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MSP430FR573xMSP430FR572x–JULY2011–REVISEDMARCH2012MIXEDSIGNALMICROCONTROLLER1FEATURES•EmbeddedMicrocontroller•EnhancedSerialCommunication–16-BitRISCArchitectureupto24-MHz–eUSCI_A0andeUSCI_A1Support:Clock–UARTWithAutomaticBaud-Rate–WideSupplyVoltageRange(2Vto3.6V)Detection–-40°Cto85°COperation–IrDAEncodeandDecode•OptimizedUltra-LowPowerModes–SPIatRatesupto10Mbps–eUSCI_B0Supports:ConsumptionMode–I2CWithMulti-SlaveAddressing(Typical)–SPIatRatesupto10MbpsActiveMode81.4µA/MHzStandby(LPM3WithVLO)6.3µA•PowerManagementSystemReal-TimeClock(LPM3.5WithCrystal)1.5µA–FullyIntegratedLDOShutdown(LPM4.5)0.32µA–SupplyVoltageSupervisorforCoreandSupplyVoltagesWithResetCapability•Ultra-LowPowerFerroelectricRAM–Always-OnZero-PowerBrownoutDetection–Upto16KBNonvolatileMemory–SerialOn-BoardProgrammingWithNo–Ultra-LowPowerWritesExternalVoltageNeeded–FastWriteat125nsperWord(16KBin1•FlexibleClockSystemms)–Fixed-FrequencyDCOWithSixSelectable–BuiltinErrorCodingandCorrection(ECC)Factory-TrimmedFrequencies(DeviceandMemoryProtectionUnit(MPU)Dependent)–DesignedtoSupportEnergy-Harvesting–Low-PowerLow-FrequencyInternalClockApplicationsSource(VLO)–UniversalMemory=Program+Data+–32-kHzCrystals(LFXT)Storage–High-FrequencyCrystals(HFXT)–1015WriteCycleEndurance•DevelopmentToolsandSoftware–RadiationResistantandNonmagnetic–FreeProfessionalDevelopment•IntelligentDigitalPeripheralsEnvironments–32-BitHardwareMultiplier(MPY)–Low-CostFull-FeaturedKit(MSP-–Three-ChannelInternalDMAEXP430FR5739)–Real-TimeClockWithCalendarandAlarm–FullDevelopmentKit(MSP-FET430U40A)Functions–TargetBoard(MSP-TS430RHA40A)–Five16-BitTimersWithuptoThree•FamilyMembersCapture/Compare–20DifferentVariantsand4Available–16-BitCyclicRedundancyChecker(CRC)PackagesSummarizedinTable1and•High-PerformanceAnalogTable2–16-ChannelAnalogComparatorWith–ForCompleteModuleDescriptions,SeetheVoltageReferenceandProgrammableMSP430FR57xxFamilyUser'sGuideHysteresis(SLAU272)–14-Channel10-BitAnalog-to-DigitalConverter(ADC)WithInternalReferenceandSample-and-Hold–200kspsat100-µAConsumption1Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.UNLESSOTHERWISENOTEDthisdocumentcontainsCopyright©2011–2012,TexasInstrumentsIncorporatedPRODUCTIONDATAinformationcurrentasofpublicationdate.ProductsconformtospecificationsperthetermsofTexasInstrumentsstandardwarranty.Productionprocessingdoesnotnecessarilyincludetestingofallparameters.芯天下--–JULY2011–REVISEDMARCH2012(SLAA530)formoreinformation.DESCRIPTIONTheTexasInstrumentsMSP430FR57xxfamilyofultralow-powermicrocontrollersconsistsofmultipledevicesfeaturingembeddedFRAMnonvolatilememory,ultralowpower16-bitMSP430CPU,anddifferentperipheralstargetedforvariousapplications.Thearchitecture,FRAM,andperipherals,combinedwithsevenlow-powermodes,areoptimizedtoachieveextendedbatterylifeinportableandwirelesssensingapplications.FRAMisanewnonvolatilememorythatcombinesthespeed,flexibility,andenduranceofSRAMwiththestabilityandreliabilityofflash,allatlowertotalpowerconsumption.Peripheralsinclude10-bitA/Dconverter,16-channelcomparatorwithvoltagereferencegenerationandhysteresiscapabilities,threeenhancedserialchannelscapableofI2C,SPI,orUARTprotocols,internalDMA,hardwaremultiplier,real-timeclock,five16-bittimers,andmore.ThefamilymembersthatareavailablearesummarizedinTable1.Table1.FamilyMemberseUSCISystemChannelFRAMSRAMPackageChannelDeviceClockADC10_BComp_DTimer_A(1)Timer_B(2)I/OA:(KB)(KB)TypeB:(MHz)UART/SPI/I2CIrDA/SPI32RHA12ext,MSP430FR57391612416ch.3,33,3,3212intch.30DA6ext,10ch.17RGE2intch.MSP430FR5738161243,33118ext,12ch.21PW(3)2intch.32RHAMSP430FR57371612416ch.3,33,3,32130DA10ch.17RGEMSP430FR5736161243,331112ch.21PW(3)32RHA12ext,MSP430FR5735812416ch.3,33,3,3212intch.30DA6ext,10ch.17RGE2intch.MSP430FR573481243,33118ext,12ch.21PW(3)2intch.32RHAMSP430FR5733812416ch.3,33,3,32130DA10ch.17RGEMSP430FR573281243,331112ch.21PW(3)32RHA12ext,MSP430FR5731412416ch.3,33,3,3212intch.30DA6ext,10ch.17RGE2intch.MSP430FR573041243,33118ext,12ch.21PW(3)2intch.32RHA12ext,MSP430FR5729161816ch.3,33,3,3212intch.30DA(1)EachnumberinthesequencerepresentsaninstantiationofTimer_Awithitsassociatednumberofcapture/compareregistersandPWMoutputgeneratorsavailable.Forexample,anumbersequenceof3,5wouldrepresenttwoinstantiationsofTimer_A,thefirstinstantiationhaving3andthesecondinstantiationhaving5capture/compareregistersandPWMoutputgenerators,respectively.(2)EachnumberinthesequencerepresentsaninstantiationofTimer_Bwithitsas