原理图参考——RK3399

5544332211DDCCBBAAApprovedAuthorChangeNoteDateVersionV0.120160325hxsFirstedictorV0.220160628xhf1、VCC1V8_DDR被悬空，需要连接到VCC_1V8给其供电。2、VCCA0V9_S0U18、VCCA1V8_S0U19的LDO使能脚网络名改成VCC1V8_S0。3、VCC0V9_DDRPLL悬空，要连接到VCC0V9_S0。4、D8901原理图库封装管脚定义反向。5、pwm3给ir使用，vdd_center改为PWM2,M28脚。6.VCCA0V9_S0改为VCC_0V9A。7.删除EMMC数据线上的上拉电阻。Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016modifynoteRK3399_BOXLinus129V02Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016modifynoteRK3399_BOXLinus129V02Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016modifynoteRK3399_BOXLinus129V025544332211DDCCBBAAPortPinnameDomainBusnamePull-upvoltageSlaveDeviceI2C0I2C1I2C2I2C3I2C4I2C5I2C6I2C7GPIO1_B7/SPI3_RXD/I2C0_SDAGPIO1_C0/SPI3_TXD/I2C0_SCLPMUIO2I2C_SDA_PMICI2C_SCL_PMICVCC1V8_PMUGPIO1_B3/I2C4_SDAGPIO1_B4/I2C4_SCLPMUIO2VCC1V8_PMUI2C_SDA_MEMSI2C_SCL_MEMSI2C_SCL_TOUCHI2C_SDA_TOUCHI2C_SCL_AUDIOI2C_SDA_AUDIOVCCA1V8_CODECI2C_SCL_HDMII2C_SDA_HDMIVCC3V0_IOGPIO4_C0/I2C3_SDA/UART2B_RXGPIO4_C1/I2C3_SCL/UART2B_TXGPIO4_A2/I2C1_SCLGPIO4_A1/I2C1_SDAAPIO5APIO4OtherpinfunctionVCC1V8_PMUVCC1V8_IOVCC1V8_IOVCC3V0_IOGPIO2_A0/VOP_D0/CIF_D0/I2C2_SDAGPIO2_A1/VOP_D1/CIF_D1/I2C2_SCLAPIO2VCC1V8_IOGPIO3_B3/MAC_CLK/I2C5_SCLGPIO3_B2/MAC_RXER/I2C5_SDAAPIO1VCC3V3_LANGPIO2_B1/SPI2_RXD/CIF_HREF/I2C6_SDAGPIO2_B2/SPI2_TXD/CIF_CLKIN/I2C6_SCLAPIO2VCC1V8_IOI2C_SDA_BATGPIO2_A7/VOP_D7/CIF_D7/I2C7_SDAGPIO2_B0/VOP_CLK/CIF_VSYNC/I2C7_SCLAPIO2VCC1V8_IOI2C_SDA_CAMI2C_SCL_CAMOtherpinfunctionI2C_SDA_PCIEI2C_SCL_PCIEVCC3V3_IOSlaveAddr(MS7Bits)Note0x60DCregulatorTILP8752-Q1EverestES8316CapellamicroCM3218AsahiKaseiAK8963CALSSensorCompassInverSenseMPU6500Accer+GyroTouchpanel0x10,0x0c0x340x10VCCA1V8_CODECOmnivisionOV8858VCC1V8_TOUCHSileadGSL36800x40AudiocodecMIPICamera0x6c,0x20Battery0x19SlaveBusCapability100kHz,400KHz,1MHzfastmode+3.4MHzhigh-speedmodeRK3399I2CMAP100KHzI2C_SCL_BATVCC1V8_DVPChromeBatteryRockchipRK808PMIC0x1bFairchildFUSB302B0x44,0x46USB-TypeCMux100kHz,400KHz,1MHzfastmode+TIBQ257000x6a(I2C)0x09(SMbus)ChargerFairchildFUSB302B0x44,0x46USB-TypeCMux100kHz,400KHz,1MHzfastmode+Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016I2CMAPRK3399_BOXLinus229V02Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016I2CMAPRK3399_BOXLinus229V02Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016I2CMAPRK3399_BOXLinus229V025544332211DDCCBBAAPMUIO1PartCPMUIO2PartEPartIAPIO1PartLAPIO2PartGAPIO3APIO4PartKPartJAPIO5PartFSDMMC0pmuio1_gpio0abpmu1830_gpio1abcdgmac_gpio3abcbt656_gpio2abwifi/bt_gpio2cdgpio1830_gpio4cdaudio_gpio3d_gpio4asdmmc_gpio4b1.8Vonly1.8V(Default)3.0V1.8V(Default)3.0V3.3Vonly1.8Vonly1.8V3.0V(Default)1.8V(Default)3.0V1.8V3.0V(Default)RK808VLDO3VCC1V8_PMURK808VLDO3VCC1V8_PMUVCC1V8_IORK808Buck4VCC3V3_IORK808VSW2VCC1V8_DVPRK808VLDO1VCC1V8_WIFIRK808Buck4VCC3V0_IORK808VLDO8VCC_1V5RK808VLDO6VCCA1V8_CODECRK808VLDO7VCC_SDIORK808VLDO4PowersupplyPowersourcePartPortPinnameindatasheetDomainI/OtypeRK3399PowerDomainMapProject:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016POWERDEMAINRK3399_BOXLinus329V02Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016POWERDEMAINRK3399_BOXLinus329V02Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016POWERDEMAINRK3399_BOXLinus329V025544332211DDCCBBAA12vinputVDD_CPU_BVDD_CENTERVDD_DDRBUCKSY8088AACVCC_0V9LDO3BUCK4BUCK3BUCK2BUCK1LDO1LDO2VCC_SYSVCC_1V8SensorVCC_EFUSELDOAPIO1_VDDUSB_AVDD_0V9LDOVCCA_0V9PLL_AVDD_0V9AVDD0V9_DDRPLLTYPEC_AVDD_0V9HDMI_AVDD_0V9EMMCAPIO1/APIO3VDDIO_WLVDDIO_WL(option)LDOSwitchBuckBUCKSY8088AACBUCKSYR837BUCKSYR838LDOVCC3V0_SDEMMC_COREUSB2.0HOSTSW2VCC3V3_S0SW1NCLDO8LDO7LDO4LDO5LDO6SY6280CAATYPECVCCA1V8_HDMIVCCA_1V8VCCA0V9_HDMIVCC_SDIONCVCC_1V5VCC_3V0NCUSB3.0HOSTSY6280CAASY6280CAAVDD_LOGVDD_CPU_LVDD_GPUDeviceSDWIFIBUCKLP3218eMMCFLASHUSBWIFIVCC3V3_SYSNMOSWM2016VCC3V3_SYSPHYTYPECUSB_AVDD_1V8TYPEC_AVDD_1V8ADC_AVDDHDMI_AVDD_1V8PLL_AVDD_1V8BuckNB679GDRK3399POWERDIAGRAM12V--5VBUCK(option)Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016POWERTREERK3399_BOXLinus429V02Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016POWERTREERK3399_BOXLinus429V02Project:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016POWERTREERK3399_BOXLinus429V025544332211DDCCBBAADDR0DDR1EMMCSDMMC0USICUSBPHY0USBPHY1TPYEC0TPYEC1ADCMIPITXMIPIRXCIFMIPITX/RXHDMIedPI2S0I2S1SDIO0OTG3.0OTG3.0&HOST3.0HOST2.0HOST2.0TFCardSPISensorI2C4I2C5AudioUART0WIFI/BTHDMIDisplayeMMC2x32bitLPDDR34x16bitDDR31x64bitLPDDR4I2C0I2C3I2C1Systempower32kclkinResetgpioDate&clk&csDate&cmd&clkSdio&clk&detDP&DMDP&DMDP&DMRK3399Cortex-A72Dual-coreCortex-A53Quad-corekeyBoardSdio&uartI2S&CLKReset&32.768khzPowerManagePmicrk808-dBuckldoProject:File:Date:FuzhouRockchipElectronicsDesignedby:Rev:Sheet:ofFriday,July01,2016BlockDiagramRK3399_BOXLinus529V02Project:File