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湘潭大学EDA课程设计报告课程设计名称：交通信号控制器的VHDL设计专业班级：学生姓名：学生学号：指导教师：完成时间：2012年4月12日目录1.设计任务及要求·············································································11.1设计任务················································································11.2设计要求···············································································12、设计方案·····················································································12.1交通灯控制系统框图·································································12.2交通灯控制器程序流程图···························································23.交通灯控制器单元模块的设计···························································33.1主控时序进程·········································································33.2主控组合进程·········································································43.3辅助进程···············································································44.交通灯控制器顶层文件原理图···························································45.VHDL源程序及仿真波形·································································45.1VHDL源程序··········································································45.2仿真波形···············································································66.硬件测试······················································································66.1引脚锁定···············································································76.2配置文件下载·········································································76.3硬件调试···············································································7心得体会··························································································8参考文献··························································································91交通信号控制器的VHDL设计1.设计任务及要求1.1设计任务模拟十字路口交通信号灯的工作过程，利用实验板上的两组红、黄、绿LED作为交通信号灯，设计一个交通信号灯控制器。要求：（1）交通灯从绿变红时，有4秒黄灯亮的间隔时间；（2）交通灯红变绿是直接进行的，没有间隔时间；（3）主干道上的绿灯时间为40秒，支干道的绿灯时间为20秒；（4）在任意时间，显示每个状态到该状态结束所需的时间。支干道主干道图1-1十字路口交通管理示意图表1-1交通信号灯的4种状态ABCD主干道交通灯绿（40秒）黄（4秒）红（20秒）红（4秒）支干道交通灯红红绿黄1.2设计要求1)采用VHDL语言编写程序，并在QUARTUSII工具平台中进行仿真，下载到EDA实验箱进行验证。2)编写设计报告，要求包括方案选择、程序清单、调试过程、测试结果及心得体会。3)设计时间和地点：两个星期，信息楼4楼EDA实验室。2、设计方案2.1交通灯控制系统框图路口交通灯控制系统与其他控制系统一样，划分为控制器和受控电路两部分。控制器使整个系统按设定的工作方式交替指挥车辆及行人的通行，并接收受2控部分的反馈信号，决定其状态转换方向及输出信号，控制整个系统的工作过程。系统框图如图2-1。图2-1十字路口交通灯控制系统框图图2-1中RGY分别表示东西方向红绿黄交通灯；rgy分别表示南北方向红绿黄交通灯。各交通灯的状态及保持总时间如表2-1。表中1表示灯亮，0表示灯灭，顺序为红绿黄。表2-1交通信号灯的4种状态S0S1S2S2主干道交通灯绿（40秒）010黄（4秒）001红（24秒）100支干道交通灯红（44秒）100绿（20秒）010黄（4秒）0012.2交通灯控制器程序流程图图2-2交通灯控制器程序主流程图开始外部CLK控制Count加1Count=68?Count清零YN控制器显示显示rgyRGY南北东西CLK3图2-3交通灯控制器程序子流程图3.交通灯控制器单元模块的设计本系统采用状态机设计，可分为三大模块，分别为主控时序进程，主控组合进程，辅助进程。3.1主控时序进程主控时序进程是负责状态机运转和在时钟驱动下负责状态转换的进程。当时钟的有效跳变到来时，时序进程只是机械地将代表次态的信号next_state中的内容送人现态的信号current_state中，而信号next_state中的内容完全由其他进程根据实际情况来决定。本设计中在主控时序进程中放置了异步复位控制信号RST。S0Count=40？S1Count=44？S3Count=68？S2Count=64？001100010100100010100001YYYYNNNN43.2主控组合进程主控组合进程也可称为状态译码进程，其任务是根据外部输入的控制信号（包括来自状态机外部的信号和来自状态机内部其他非主控的组合或时序进程的信号），或和当前状态的状态值确定下一状态（next_state）的取向，即next_state的取值内容，以及确定对外输出或对内部其他组合或时序进程输出控制信号的内容。本设计中主控组合进程通过信号current_s中的状态值，进入相应的状态，向外部输出交通灯和数码显示器控制信号，并在此状态中根据辅助进程的COUNT68的值来确定下一状态的走向，即向次态信号next_s中赋入相应的状态值。此状态值通过next_s传给主控时序进程，直到下一个时钟脉冲的到来再进入另一次的状态转换周期。3.3辅助进程辅助进程用于配合状态机工作的组合进程或时序进程。本设计的辅助进程是秒计数器。秒计数器通过外部秒时钟CLK计数，当时钟CLK上升沿到来时，COUNT68的值加1，COUNT68的值传递给主控组合进程，COUNT68的值等于68时清零重新计数。此进程放置有异步复位控制信号RST。4.交通灯控制器顶层文件原理图current_s[1..0]COUNT68[7..0]next_s[1..0]LEDCTRL[5..0]WESEGH[3..0]WESEGL[3..0]NSSEGH[3..0]NSSEGL[3..0]COMinstCLKRSTCOUNT68[7..0]COUNTinst1CLKRSTnext_s[1..0]current_s[1..0]REGinst2VCCRSTINPUTNSSEGL[3..0]OUTPUTWESEGL[3..0]OUTPUTWESEGH[3..0]OUTPUTLEDCTRL[5..0]OUTPUTVCCCLKINPUTNSSEGH[3..0]OUTPUT图4-1顶层文件原理图5.VHDL源程序及仿真波形5.1VHDL源程序LIBRARYIEEE;USEIEEE.STD_LOGIC_1164.ALL;USEIEEE.STD_LOGIC_UNSIGNED.ALL;ENTITYTRAFFIC_LAMPIS5PORT(CLK,RST:INSTD_LOGIC;LEDCTRL:OUTSTD_LOGIC_VECTOR(5DOWNTO0);WESEGH:OUTSTD_LOGIC_VECTOR(3DOWNTO0);WESEGL:OUTSTD_LOGIC_VECTOR(3DOWNTO0);NSSEGH:OUTSTD_LOGIC_VECTOR(3DOWNTO0);NSSEGL:OUTSTD_LOGIC_VECTOR(3DOWNTO0));ENDENTITYTRAFFIC_LAMP;ARCHITECTUREbehavOFTRAFFIC_LAMPISTYPEFSM_STIS(S0,S1,S2,S3);SIGNALcurrent_s,next_s:FSM_ST;SIGNALCOUNT68:STD_LOGIC_VECTOR(7DOWNTO0);BEGINCOUNT:PROCESS(RST,CLK)--辅助进程BEGINIFRST='1'THENCOUNT68=00000000;--检测异步复位信号ELSIFCLK'EVENTANDCLK='1'THENIFCOUNT6801000011THENCOUNT68=COUNT68+1;ELSECOUNT68=00000000;ENDIF;ENDIF;ENDPROCESS;REG:PROCESS(RST,CLK)--主控时序进程BEGINIFRST='1'THENcurrent_s=s0;--检测异步复位信号ELSIFclk='1'ANDclk'EVENTTHENcurrent_s=next_s;ENDIF;ENDPROCESS;COM:PROCESS(current_s,COUNT68)--主控组合进程VARIABLEWESEG,NSSEG:STD_LOGIC_VECTOR(7DOWNTO0);BEGINCASEcurrent_sISWHENs0=LEDCTRL=010100;WESEG:=39-COUNT68;NSSEG:=43-COUNT68;IFCOUNT68=00100111THENnext_s=s1;ELSEnext_s=s0;ENDIF;WHENs1=LEDCTRL=001100;WESEG:=43-COUNT68;NSSEG:=43-COUNT68;6IFCOUNT68=00101011THENnext_s=s2;ELSEnext_s=s1;ENDIF;WHENs2=LEDCTRL=100010;WESEG:=67-COUNT68;NSSEG:=63-COUNT68;IFCOUNT68=00111111THENnext_s=s3;ELSEnext_s=s2;ENDIF;WHENs3=LEDCTRL=100001;WESEG:=67-COUNT68;NSSEG:=67-COUNT68;IFCOUNT68=01000011THENnext_