CD4006

CD4006CMOS18-StageStaticRegisterPinoutCD4006BMTOPVIEWFunctionalDiagramD1D1+4’CLOCKD2D3D4VSSVDDD1+4D2+5D2+4D3+4D4+5D4+41234567141312111098LATCH4STAGE4STAGE4STAGE1STAGE1STAGE4STAGEVSS7891011122131435614VDDD1+4D1+4’D2+5D2+4D3+4D4+5D4+4D4D3CLOCKD2D1Features•High-VoltageType(20VRating)•FullyStaticOperation•ShiftingRatesUpto12MHzat10V(typ)•PermanentRegisterStoragewithClockLineHighorLow-NoInformationRecirculationRequired•100%TestedforQuiescentCurrentat20V•Standardized,SymmetricalOutputCharacteristics•5V,10Vand15VParametricRatings•MaximumInputCurrentof1µAat18VOverFullPack-age-TemperatureRange;100nAat18Vand+25oC•NoiseMargin(FullPackage-TemperatureRange):-1VatVDD=5V-2VatVDD=10V-2.5VatVDD=15V•MeetsAllRequirementsofJEDECTentativeStan-dardsNo.13B,“StandardSpecificationsforDescrip-tionof“B”SeriesCMOSDevices”Applications•SerialShiftRegisters•FrequencyDivision•TimeDelayCircuitsDescriptionCD4006BMStypesarecomposedof4separateshiftregistersections:twosectionsoffourstagesandtwosectionsoffivestageswithanoutputtapatthefourthstage.Eachsectionhasanindependentsingle-raildatapath.Acommonclocksignalisusedforallstages.Dataareshiftedtothenextstagesonnegative-goingtransitionsoftheclock.Throughappropriateconnectionsofinputsandoutputs,multi-pleregistersectionsof4,5,8,and9stagesorsingleregistersectionsof10,12,13,14,16,17and18stagescanbeimple-mentedusingoneCD4006BMSpackage.LongershiftregistersectionscanbeassembledbyusingmorethanoneCD4006BMS.Tofacilitatecascadingstageswhenclockriseandfalltimesareslow,anoptionaloutput(D1+4’)thatisdelayedone-halfclock-cycle,isprovided(seeTruthTableforOutputfromTerm.2).TheCD4006BMSissuppliedinthese14leadoutlinepack-ages:BrazeSealDIPH4QFritSealDIPH6DCeramicFlatpackH4F(VDD)...............-0.5Vto+20V(VoltageReferencedtoVSSTerminals)InputVoltageRange,AllInputs.............-0.5VtoVDD+0.5VDCInputCurrent,AnyOneInput........................±10mAOperatingTemperatureRange................-55oCto+125oCPackageTypesD,F,K,HStorageTemperatureRange(TSTG)...........-65oCto+150oCLeadTemperature(DuringSoldering).................+265oCAtDistance1/16±1/32Inch(1.59mm±0.79mm)fromcasefor10sMaximumThermalResistance................θjaθjcCeramicDIPandFRITPackage.....80oC/W20oC/WFlatpackPackage................70oC/W20oC/WMaximumPackagePowerDissipation(PD)at+125oCForTA=-55oCto+100oC(PackageTypeD,F,K)......500mWForTA=+100oCto+125oC(PackageTypeD,F,K).....DerateLinearityat12mW/oCto200mWDeviceDissipationperOutputTransistor...............100mWForTA=FullPackageTemperatureRange(AllPackageTypes)JunctionTemperature..............................+175oCTABLE1.DCELECTRICALPERFORMANCECHARACTERISTICSPARAMETERSYMBOLCONDITIONS(NOTE1)GROUPASUBGROUPSTEMPERATURELIMITSUNITSMINMAXSupplyCurrentIDDVDD=20V,VIN=VDDorGND1+25oC-10µA2+125oC-1000µAVDD=18V,VIN=VDDorGND3-55oC-10µAInputLeakageCurrentIILVIN=VDDorGNDVDD=201+25oC-100-nA2+125oC-1000-nAVDD=18V3-55oC-100-nAInputLeakageCurrentIIHVIN=VDDorGNDVDD=201+25oC-100nA2+125oC-1000nAVDD=18V3-55oC-100nAOutputVoltageVOL15VDD=15V,NoLoad1,2,3+25oC,+125oC,-55oC-50mVOutputVoltageVOH15VDD=15V,NoLoad(Note3)1,2,3+25oC,+125oC,-55oC14.95-VOutputCurrent(Sink)IOL5VDD=5V,VOUT=0.4V1+25oC0.53-mAOutputCurrent(Sink)IOL10VDD=10V,VOUT=0.5V1+25oC1.4-mAOutputCurrent(Sink)IOL15VDD=15V,VOUT=1.5V1+25oC3.5-mAOutputCurrent(Source)IOH5AVDD=5V,VOUT=4.6V1+25oC--0.53mAOutputCurrent(Source)IOH5BVDD=5V,VOUT=2.5V1+25oC--1.8mAOutputCurrent(Source)IOH10VDD=10V,VOUT=9.5V1+25oC--1.4mAOutputCurrent(Source)IOH15VDD=15V,VOUT=13.5V1+25oC--3.5mANThresholdVoltageVNTHVDD=10V,ISS=-10µA1+25oC-2.8-0.7VPThresholdVoltageVPTHVSS=0V,IDD=10µA1+25oC0.72.8VFunctionalFVDD=2.8V,VIN=VDDorGND7+25oCVOHVDD/2VOLVDD/2VVDD=20V,VIN=VDDorGND7+25oCVDD=18V,VIN=VDDorGND8A+125oCVDD=3V,VIN=VDDorGND8B-55oCInputVoltageLow(Note2)VILVDD=5V,VOH4.5V,VOL0.5V1,2,3+25oC,+125oC,-55oC-1.5VInputVoltageHigh(Note2)VIHVDD=5V,VOH4.5V,VOL0.5V1,2,3+25oC,+125oC,-55oC3.5-VInputVoltageLow(Note2)VILVDD=15V,VOH13.5V,VOL1.5V1,2,3+25oC,+125oC,-55oC-4VInputVoltageHigh(Note2)VIHVDD=15V,VOH13.5V,VOL1.5V1,2,3+25oC,+125oC,-55oC11-VNOTES:1.AllvoltagesreferencedtodeviceGND,100%testingbeingimplemented.2.Go/NoGotestwithlimitsappliedtoinputs3.Foraccuracy,voltageismeasureddifferentiallytoVDD.Limitis0.050Vmax.(NOTE1,2)GROUPASUBGROUPSTEMPERATURELIMITSUNITSMINMAXPropagationDelayTPHLTPLHVDD=5V,VIN=VDDorGND9+25oC-400ns10,11+125oC,-55oC-540nsTransitionTimeTTHLTTLHVDD=5V,VIN=VDDorGND9+25oC-200ns10,11+125oC,-55oC-270nsMaximumClockInputFrequencyFCLVDD=5V9+25oC2.5-MHzVIN=VDDorGND10,11+125oC,-55oC1.85-MHzNOTES:1.CL=50pF,RL=200K,InputTR,TF20ns.2.55oCand+125oClimitsguaranteed,100%testingbeingimplemented.TABLE3.ELECTRICALPERFORMANCECHARACTERISTICSPARAMETERSYMBOLCONDITIONSNOTESTEMPERATURELIMITSUNITSMINMAXSupplyCurrentIDDVDD=5V,VIN=VDDorGND1,2-55oC,+25oC-5µA+125oC-150µAVDD=10V,VIN=VDDorGND1,2-55oC,+25oC-10µA+12