AMBA-APB-study-review

AMBAAPBSummary1.AMBAAPB2/APB3/APB4区别1)APB2:basictimingandfunction2)ComparetoAPB2,APB3adds:PREADY:waitstates,toextendanAPBtransferPSLVERR:toindicatethefailureofatransfer(,cannotwritedataornovalidreaddata,notnecessary)3)ComparetoAPB3,APB4adds:PPROT[2:0]:protectiontypePSTRB[3:0]:writestrobe,indicatewhichbytecontainsvalidwdata(mustbedrivenalllowwhenreadtransfer)2.AMBAAPB2/APB3/APB4共同点1)ThebasictimingisbasedonAPB2,whenPREADYistiedHIGH,APB3/APB4becomesAPB2,andAPB2slavecanconnectdirectlytoAPB3/APB4withoutchange.AMBA2.0APB1.Operatingstatus*SETUP&ENABLEstatebothonlylastforonecycle,thatiseachtransferlastonlytwocycles2.basictiming*PSELxx,PADDR,PWDATA,PWRITEmustkeepconstantduringthetransferchangefromSETUPtoENABLEstate*PRDATAjustneedtoprovidevaliddataatthelastcyclefortransfer.3.APBBridge*function:convertssystembustransfersintoAPBtransfersandperformsthefollowingfunctionsLatchstheaddressandholdsitvalidthroughoutthetransferDecodetheaddressandgeneratePSELxDrivesthedataontotheAPBforawritetransferDrivestheAPBdataontothesystembusforareadtransferGeneratePENABLEforthetransfer4.AHBtoAPBTiminga)writetransferb)readtransferc)notes*writetransferneedtwocyclestoloadthefirstaddress,butreadjustneedone.Thereasoniswritetransferneedonecycletwosendwdataafteraddress,whileAPBbridgeneedloadaddress&wdatasimultaneously,soithastowaitthewdataloaded,thusneedtwocyclestoloadfirstaddr;readtransferdoesn’tneeddata,itjustneedtoloadaddr,soonecycleisenough.*theabovetransfertimingisthesituationthathasthefastesttransfertypeaseachtransferneedtwocycleswithoutIDLE,addr2isregisteredinadvance,thisisrealizedbyusingtworegisterandAHB&APBhasthesameclock.Inreality,APBmaynothavesameclockasAHB,andwemayneedafifo(orsomething)withgreaterdepthtoregistertheuntreatedaddress.AMBA3.0APB1.Operatingstatus*thetransferissimilartoAPB2,thedifferenceistheACCESSstatemaynotlastonlyonecyclewiththePREADY,whenPREADY=LOW,itextendthetransfer*Timing*thePSEL,PWRITE,PADDR,PWDATAmustkeepconstantduringthewholetransfer,whilePRDATAjustneedtobevalidwhenthePREADY/PSEL/PENABLEareallHIGH2.PREADYDuringtheACCESSstate,whenPREADY=LOW,itextendthetransferuntilPREADY=HIGH,theACCESSstatecanlastmorethanonecycle.PREADYcantakeanyvaluewhenPENABLE=LOW,thismakeiseasyforaAPB2slaveconnectAPB3BridgedirectlythroughtiePREADY=HIGH3.PSLEVRRMappingPSLEVRRisonlyconsideredvalidduringthelastcycleoftransfer,thatiswhenPREADY/PSEL/PENABLEareallHIGHFromAXItoAPBmapping:RRESP/BRESP=SLVERR,mappingPSLEVRRtoRRESP[1]forreadsandBRESP[1]forwriteFromAHBtoAPBmapping:HRESP=ERROR,mappingPSLEVRRtoHRESP[0]AMBA4.0APB1.OperatingstatusSameasAPB32.PPROT[2:0]ProtectiontypePPROT[0]:0–normalaccess1–privilegedaccessPPROT[1]:0–secureaccess1–non-secureaccessPPROT[2]:0–dataaccess1–instructionaccess3.PSTRB[3:0]Writestrobesignal,enableSparsedatatransfer.Eachbitcorrespondtoonebyteofthewdatabus,whenPSTRB[n]=HIGH,itindicatethebytedatacontainsvalidinformation.Forreadtransfer,thebusmastermustdriveallbitsofPSTRBLOW!4.signalssignalsourcesignalSourcePCLKClocksourcePPROTSystembusequivalentPRESETnSystembusequivalentPSTRBSystembusequivalentPADDRAPBBridgePWDATAAPBBridgePSELxAPBBridgePREADYSlaveinterfacePENABLEAPBBridgePRDATASlaveinterfacePWRITEAPBBridgePSLVERRSlaveinterface