STM8L参考手册

July2010DocID15226Rev51/508RM0031ReferencemanualSTM8L15xmicrocontrollerfamilyIntroductionThisreferencemanualtargetsapplicationdevelopers.ItprovidescompleteinformationonhowtousetheSTM8L15xmicrocontrollermemoryandperipherals.TheSTM8L15xisafamilyofmicrocontrollerswithdifferentmemorydensities,packagesandperipherals.Themedium-densitySTM8L15xdevicesareSTM8L151x4,STM8L151x6,STM8L152x4,andSTM8L152x6microcontrollerswheretheFlashmemorydensityrangesbetween16and32Kbytes.Theyaredesignedforultralowpowerapplications.Fororderinginformation,pindescription,mechanicalandelectricaldevicecharacteristics,pleaserefertotheSTM8L15xdatasheet.ForinformationontheSTM8SWIMcommunicationprotocolanddebugmodule,pleaserefertotheusermanual(UM0470).ForinformationontheSTM8core,pleaserefertotheSTM8CPUprogrammingmanual(PM0044).(CPU)................................271.1Introduction...............................................271.2CPUregisters..............................................271.2.1DescriptionofCPUregisters.................................271.2.2STM8CPUregistermap....................................311.3Globalconfigurationregister(CFG_GCR)........................311.3.1Activationlevel............................................311.3.2SWIMdisable.............................................321.3.3Descriptionofglobalconfigurationregister(CFG_GCR)............321.3.4Globalconfigurationregistermapandresetvalues................322BootROM.................................................333FlashprogrammemoryanddataEEPROM(Flash)...............343.1Introduction...............................................343.2Glossary..................................................343.3Flashmainfeatures.........................................353.4Memoryorganization........................................363.4.1Userbootarea(UBC)......................................363.4.2DataEEPROM(DATA)......................................373.4.3Mainprogramarea........................................383.4.4Optionbytes..............................................383.5Memoryprotection..........................................383.5.1Readoutprotection........................................383.5.2Memoryaccesssecuritysystem(MASS).......................383.5.3Enablingwriteaccesstooptionbytes..........................403.6Memoryprogramming.......................................403.6.1Read-while-write(RWW)....................................403.6.2Byteprogramming.........................................403.6.3Wordprogramming........................................413.6.4Blockprogramming........................................423.6.5Optionbyteprogramming...................................433.7Flashlowpowermodes......................................43RM0031ContentsDocID15226Rev53/5083.8ICPandIAP...............................................453.9Flashregisters.............................................463.9.1Flashcontrolregister1(FLASH_CR1).........................463.9.2Flashcontrolregister2(FLASH_CR2).........................483.9.3Flashprogrammemoryunprotectingkeyregister(FLASH_PUKR)...493.9.4DataEEPROMunprotectionkeyregister(FLASH_DUKR)..........493.9.5Flashstatusregister(FLASH_IAPSR)..........................503.9.6Flashregistermapandresetvalues...........................514Singlewireinterfacemodule(SWIM)anddebugmodule(DM).....524.1Introduction...............................................524.2Mainfeatures..............................................524.3SWIMmodes..............................................525Memoryandregistermap...................................535.1Registerdescriptionabbreviations..............................536Powercontrol(PWR)........................................546.1Powersupply..............................................546.2Power-onreset(POR)/power-downreset(PDR)...................556.3Brownoutreset(BOR).......................................556.4Programmablevoltagedetector(PVD)...........................566.5Voltageregulator...........................................576.6PWRregisters.............................................596.6.1Powercontrolandstatusregister1(PWR_CSR1)................596.6.2PWRcontrolandstatusregister2(PWR_CSR2).................606.6.3PWRregistermapandresetvalues...........................607Lowpowermodes..........................................617.1Slowingdownthesystemclocks...............................627.2Peripheralclockgating(PCG).................................627.3Waitmode(WFIorWFEmode)................................627.4Waitforinterrupt(WFI)mode..................................637.5Waitforevent(WFE)mode...................................637.5.1WFEregisters............................................647.5.2WFEregistermapandresetvalues............................68ContentsRM00314/508DocID15226Rev57.6Lowpowerrunmode........................................697.6.1EnteringLowpowerrunmode................................697.6.2ExitingLowpo