LEDA使用说明一.LEDA概述LEDA是Synopsys公司的一种可编程代码设计规则检查器,它提供全芯片级混合语言(Verilog和VHDL)处理能力,从而加快了复杂的SOC设计的开发。1.LEDA作用(1)LEDA预装的检查规则大大地增强了设计人员检查HDL代码的能力,包括可综合性,可仿真性、可测试性和可重用性。利用所提供的设计规则,能进一步的提高Synopsys工具,例如VCS、DesignCompiler以及Formality的性能。(2)LEDA的规则集有助于设计人员共享他们的设计经验,对硬件设计预检查,且将设计风险降到最低。1.LEDA作用(3)使用LEDA,可以对硬件设计的仿真和综合进行预检查,消除设计流程中的瓶颈,其中Verilog代码设计规则可确保按内部或外部工具要求优化代码。(4)LEDA提供的设计规则可提高Synopsys工具的性能。2.LEDA功能(1)支持Verilog/VHDL混合语言的设计。(2)包含先进的硬件设计推测和层次化检查的能力,确保设计人员对特殊硬件结构(包括时钟、寄存器、锁存器)进行规则检查。(3)包括预装全面的设计规则检查和规范集。(4)针对Synopsys工具性能优化的HDL代码检查,以确保与工具(如DesignCompiler、VCS和Formality)的最新功能要求兼容。LEDA关系图二.LEDA详细介绍1.结构LEDA包含Checker和Specifier两个功能不同的工具.Checker是主要的检查工具,如果LEDA自带的prepackagedrule能满足用户检查需要,那么我们可以直接用Checker进行检查.Specifier是自定义Rule的工具,当prepackagedrule不能满足用户的检查需要时,我们需要Specifier定义需要的Rule,再进行检查.2.流程当LEDA自带的prepackagedrule能满足用户检查需要,可立刻进行检查.当LEDA自带的prepackagedrule部分满足用户检查需要,可先对prepackagedrule进行修改,再进行检查.当LEDA自带的prepackagedrule完全不符合用户检查需要,那就需要Specifier重新定义需要的Rule,再进行检查.3.模式LEDA有三种操作模式,分别为:①GUImode②Batchmode③TCLmode①GUImodeGUImode即图形界面模式,主要适合于初学者使用.无论之前使用什么模式,用户都可以使用GUImode进行回顾和调试错误.用户在GUImode下可以在主菜单的控制台上转换到TCLmode.LEDA默认模式为GUImode②Batchmode此模式适合于对LEDA比较熟悉的用户.用户可以在此模式下进行脚本操作.③TCLmode用户使用较多的一种模式.用户可以通过TCLshell使用DesignQueryLanguage(DQL)进行设计规则的检查.还可以通过此模式进行Ledaprojects的管理,ruleconfigurations,还有运行Checker.三种模式关系4.Checker使用介绍在命令行键入“LEDA”,LEDA启动,默认为GUI模式,我们以GUI模式为主,详细介绍LEDA用法.(以Verilog为例)⑴CreatingProjectstoCheckHDLCode①在主菜单选择ProjectNew.EnterthefullpathandnameforyourprojectintheProjectNamefieldatthetopofthewindow,orenterjustaprojectnameandusetheBrowsebuttontonavigatetoadirectorywhereyouwanttostoreyourprojectdata.ThenclicktheNextbuttonatthebottomrightofthewindowtostarttheWizard②SpecifyCompilerOptionsWithsemanticexceptions:enabledbydefault,选择此选项能避免不必要的报错.Example:Thisstandarddoesnotallowparametersdeclaredwitharange,asshowninthefollowingexample:parameter[3:0]p=4'b0101;(illegalinIEEEmode)(legalinexceptionmode)②SpecifyCompilerOptionsSYNOPSYStranslate_onandtranslate_offdirectives:disabledbydefault.当用户选择disabled时,Leda将不会尝试translate有限制的代码,这样对没有综合的代码来说,可以起到testbenches的作用,也就是说可能导致不可预知的结果,从而起到检查作用.②SpecifyCompilerOptionsDonotusecasetodistinguishidentifiernames:disabledbydefault.对于Verilog有效,如果需要辨别标识符,请选上.②SpecifyCompilerOptionsSeverityLevelpanel:ThedefaultisWarning.LEDA报错的级别,分别fatal,error,warning,note,用户选择的选项以下的级别将不会被报告出来.②SpecifyCompilerOptionsIncludeDirectoriespane:usetheAddbuttontonavigatetoanydirectoriesthatyouwanttobesearchedforincludedfilesinyourdesign.MacroDefinitionfield:specifythevaluesforanypreprocessormacrosthatyouwanttobeineffectfortheanalysis.Versionpane:dependingontheversionofVerilogyouareusing.ThedefaultisVerilog95.ForinformationonLeda’ssupportlevelsforVerilog2001andSystemVerilog,②SpecifyCompilerOptionsWorkinglibrariespane:clickontheNewbuttonandusetheNewLibraryWindowtospecifythenameofaworkinglibrarythatyouwanttoaddtoyourproject.②SpecifyCompilerOptionsLibrarydirectoriesandLibraryfilespanes:clickontheAddbuttonandnavigatetothelocationsofanyrequiredsourcecodelibrariestobesearchedbytheVeriloganalyzerinordertoresolveunresolvedmoduleinstances.ClickontheEnableCheckscheckboxifyouwantLedatocheckselectedrulesinthespecifiedlibrarydirectoriesorfiles.②SpecifyCompilerOptionsDirectories/Filespane:openstheAddDirectory/Filewindow.Navigatetothelocationofthe.v,.ve,or.incfilesyouwanttocheck.(2)UsingRulewizardtoselect/deselectRuleWithaprojectbuilt,youcancustomizetheCheckertorunjusttherulesthatyouareinterestedinagainstyourVHDLandVerilogsourcecode.(2)UsingRulewizardtoselect/deselectRule①setupyourenvironmentforrunningtheChecker.②defineanymacrosneededforexpandingrulespriortochecking.③fromthemainmenu,chooseCheckConfigure.ThisopenstheRuleWizard;(3)UsingPrebuiltConfigurationsToloadadifferentruleconfiguration,fromtheRuleWizardchooseConfigLoadconfiguration(3)UsingPrebuiltConfigurations:(Ⅰ)Gate-level:contains90chip-levelandnetlist/designrulesselectedfromtheDesignandLedageneralcodingguidelinespolicies.Leda-classic:containsroughly1,300rulesdrawnfromeveryprepackagedpolicyexceptDesignWareandSTARC.Itisclosetothedefaultconfigurationusedinpreviousversionsofthetool.(3)UsingPrebuiltConfigurations:(Ⅱ)Leda-optimized:containsroughly1,100rulesfromthesamepoliciesasLeda-classic.Thisconfigurationis“optimized”toremovesimilarrulesfromdifferentpolicies.RTL:containsabout70rulesdrawnfromtheDC,DFT,Formality,RMM,andLedageneralcodingguidelinespolicies.Thisconfigurationisthedefault.(3)UsingPrebuiltConfigurations:(Ⅲ)Custom:ifyouchooseCustom,usetheLoadconfigurationwindowthatpopsuptonavigatetoandselectyourcustomconfiguration.(4)SelectingorDeselectingRulesUsethePolicyandTopictabsontheleftsideofthewindowtoselectordeselectentirepolicies,topics,orrulesetsfromeitherthepolicyortopicpointofview.(4)SelectingorDeselectingRulesTheboxiconsinthePolicytabontheleftsideoftheRuleWizarddisplaytellyoutheruleselectionstatusfortherulesineachpolicy:Anopenbox(clear):indicatesthatallrulesinthatpolicyaredeselectedforchecking;Afullbox(set):indicatesthatallrulesinthatpolicyaresel