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MC145151–2throughMC145158–2MOTOROLA1 ! ! !CMOSThedevicesdescribedinthisdocumentaretypicallyusedaslow–power,phase–lockedloopfrequencysynthesizers.Whencombinedwithanexternallow–passfilterandvoltage–controlledoscillator,thesedevicescanprovidealltheremainingfunctionsforaPLLfrequencysynthesizeroperatinguptothedevice’sfrequencylimit.ForhigherVCOfrequencyoperation,adownmixeroraprescalercanbeusedbetweentheVCOandthesynthesizerIC.Thesefrequencysynthesizerchipscanbefoundinthefollowingandotherapplications:CATVTVTuningAM/FMRadiosScanningReceiversTwo–WayRadiosAmateurRadio÷ROSCCONTROLLOGIC÷N÷Aϕ÷P/P+1VCOOUTPUTFREQUENCYCONTENTSPageDEVICEDETAILSHEETSMC145151–2Parallel–Input,Single–Modulus2..................................................................MC145152–2Parallel–Input,Dual–Modulus5...................................................................MC145155–2Serial–Input,Single–Modulus9...................................................................MC145156–2Serial–Input,Dual–Modulus13....................................................................MC145157–2Serial–Input,Single–Modulus17..................................................................MC145158–2Serial–Input,Dual–Modulus20....................................................................FAMILYCHARACTERISTICSMaximumRatings23........................................................................................DCElectricalCharacteristics23...............................................................................ACElectricalCharacteristics25...............................................................................TimingRequirements26......................................................................................FrequencyCharacteristics27.................................................................................PhaseDetector/LockDetectorOutputWaveforms27.............................................................DESIGNCONSIDERATIONSPhase–LockedLoop—Low–PassFilterDesign28..............................................................CrystalOscillatorConsiderations29............................................................................Dual–ModulusPrescaling30..................................................................................OrderthisdocumentbyMC145151–2/D SEMICONDUCTORTECHNICALDATA Motorola,Inc.1995REV18/95MC145151–2throughMC145158–2MOTOROLA2 InterfaceswithSingle–ModulusPrescalersTheMC145151–2isprogrammedby14parallel–inputdatalinesfortheNcounterandthreeinputlinesfortheRcounter.Thedevicefeaturesconsistofareferenceoscillator,selectable–referencedivider,digital–phasedetector,and14–bitprogrammabledivide–by–Ncounter.TheMC145151–2isanimproved–performancedrop–inreplacementfortheMC145151–1.ThepowerconsumptionhasdecreasedandESDandlatch–upperformancehaveimproved.•OperatingTemperatureRange:–40to85°C•LowPowerConsumptionThroughUseofCMOSTechnology•3.0to9.0VSupplyRange•On–orOff–ChipReferenceOscillatorOperation•LockDetectSignal•÷NCounterOutputAvailable•SingleModulus/ParallelProgramming•8User–Selectable÷RValues:8,128,256,512,1024,2048,2410,8192•÷NRange=3to16383•“Linearized”DigitalPhaseDetectorEnhancesTransferFunctionLinearity•TwoErrorSignalOptions:Single–Ended(Three–State)orDouble–Ended•ChipComplexity:8000FETsor2000EquivalentGates SEMICONDUCTORTECHNICALDATA PSUFFIXPLASTICDIPCASE710DWSUFFIXSOGPACKAGECASE751FORDERINGINFORMATIONMC145151P2PlasticDIPMC145151DW2SOGPackage54321109876111213142021222324252619272818171615RA2PDoutVDDVSSfinN0ϕRRA0N3N2N1RA1ϕVfVN10N11OSCoutOSCinLDN5N6N7N4N9N12N13N8T/RPINASSIGNMENT128128Motorola,Inc.1995REV18/95MC145151–2throughMC145158–2MOTOROLA314x8ROMREFERENCEDECODER14–BIT÷NCOUNTERϕVMC145151–2BLOCKDIAGRAMϕR14–BIT÷RCOUNTERTRANSMITOFFSETADDERPHASEDETECTORBPHASEDETECTORALOCKDETECTLDPDoutRA2finVDDOSCinOSCoutT/R1414fVN13N11N9N7N6N4N2N0NOTE:N0–N13inputsandinputsRA0,RA1,andRA2havepull–upresistorsthatarenotshown.RA0RA1PINDESCRIPTIONSINPUTPINSfinFrequencyInput(Pin1)Inputtothe÷Nportionofthesynthesizer.finistypicallyderivedfromloopVCOandisaccoupledintothedevice.Forlargeramplitudesignals(standardCMOSlogiclevels)dccouplingmaybeused.RA0–RA2ReferenceAddressInputs(Pins5,6,7)Thesethreeinputsestablishacodedefiningoneofeightpossibledividevaluesforthetotalreferencedivider,asdefinedbythetablebelow.Pull–upresistorsensurethatinputsleftopenremainatalogic1andrequireonlyaSPSTswitchtoalterdatatothezerostate.ReferenceAddressCodeTotalDivideValueRA2RA1RA0DivideValue00001111001100110101010181282565121024204824108192N0–N11NCounterProgrammingInputs(Pins11–20,22–25)Theseinputsprovidethedatathatispresetintothe÷Ncounterwhenitreachesthecountofzero.N0istheleastsig-nificantandN13isthemostsignificant.Pull–upresistorsen-surethatinputsleftopenremainatalogic1andrequireonlyanSPSTswitchtoalterdatatothezerostate.T/RTransmit/ReceiveOffsetAdderInput(Pin21)ThisinputcontrolstheoffsetaddedtothedataprovidedattheNin