LM3S1607-IQR50-A0T,LM3S1607-IQR50-A0, 规格书,Datashee

Stellaris®LM3S1607MicrocontrollerDATASHEETCopyright©2007-2011TexasInstrumentsIncorporatedDS-LM3S1607-11107TEXASINSTRUMENTS-PRODUCTIONDATA芯天下--©2007-2011TexasInstrumentsIncorporatedAllrightsreserved.Stellaris®andStellarisWare®areregisteredtrademarksofTexasInstrumentsIncorporated.ARMandThumbareregisteredtrademarksandCortexisatrademarkofARMLimited.Othernamesandbrandsmaybeclaimedasthepropertyofothers.PRODUCTIONDATAinformationiscurrentasofpublicationdate.ProductsconformtospecificationsperthetermsofTexasInstrumentsstandardwarranty.Productionprocessingdoesnotnecessarilyincludetestingofallparameters.Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.TexasInstrumentsIncorporated108WildBasin,Suite350Austin,TX78746://芯天下--™-M3.........................................................................................................411.4.2MotorControlPeripherals..............................................................................................421.4.3AnalogPeripherals........................................................................................................421.4.4SerialCommunicationsPeripherals................................................................................431.4.5SystemPeripherals.......................................................................................................441.4.6MemoryPeripherals......................................................................................................451.4.7AdditionalFeatures.......................................................................................................451.4.8HardwareDetails..........................................................................................................462TheCortex-M3Processor......................................................................................472.1BlockDiagram..............................................................................................................482.2Overview......................................................................................................................492.2.1System-LevelInterface..................................................................................................492.2.2IntegratedConfigurableDebug......................................................................................492.2.3TracePortInterfaceUnit(TPIU).....................................................................................502.2.4Cortex-M3SystemComponentDetails...........................................................................502.3ProgrammingModel......................................................................................................512.3.1ProcessorModeandPrivilegeLevelsforSoftwareExecution...........................................512.3.2Stacks..........................................................................................................................512.3.3RegisterMap................................................................................................................522.3.4RegisterDescriptions.......................................................................................