MM80C98N中文资料

October1987RevisedJanuary1999MM80C95•MM80C97•MM80C983-STATEHexBuffers•3-STATEHexInverters©1999FairchildSemiconductorCorporationDS005907.prf•MM80C97•MM80C983-STATEHexBuffers•3-STATEHexInvertersGeneralDescriptionTheMM80C95,MM80C97andMM80C98gatesaremono-lithiccomplementaryMOS(CMOS)integratedcircuitscon-structedwithN-andP-channelenhancementmodetransistors.TheMM80C95andtheMM80C97convertCMOSorTTLoutputsto3-STATEoutputswithnologicinversion,theMM80C98providesthelogicaloppositeoftheinputsignal.TheMM80C95hascommon3-STATEcontrolsforallsixdevices.TheMM80C97andtheMM80C98havetwo3-STATEcontrols;onefortwodevicesandonefortheotherfourdevices.InputsareprotectedfromdamageduetostaticdischargebydiodeclampstoVCCandGND.Features■Widesupplyvoltagerange:3.0Vto15V■Guaranteednoisemargin:1.0V■Highnoiseimmunity:0.45VCC(typ.)■TTLcompatible:Drive1TTLLoadApplications•Busdrivers:Typicalpropagationdelayinto150pFloadis40nsOrderingCode:DevicesalsoavailableinTapeandReel.Specifybyappendingthesuffixletter“X”totheorderingcode.ConnectionDiagramsPinAssignmentsforDIPMM80C95TopViewMM80C97TopViewMM80C98TopViewOrderNumberPackageNumberPackageDescriptionMM80C95NN16E16-LeadPlasticDual-In-LinePackage(PDIP),JEDECMS-001,0.300”WideMM80C97MM16A16-LeadSmallOutlineIntegratedCircuit(SOIC),JEDECMS-012,0.150”NarrowMM80C97NN16E16-LeadPlasticDual-In-LinePackage(PDIP),JEDECMS-001,0.300”WideMM80C98NN16E16-LeadPlasticDual-In-LinePackage(PDIP),JEDECMS-001,0.300”Wide•MM80C97•MM80C98SchematicDiagramsMM80C953-STATEMM80C973-STATEMM80C983-STATETruthTablesMM80C95MM80C97MM80C98X=IrrelevantNote1:Output5–6onlyNote2:Output1–4onlyDisableInputInputOutputDIS1DIS20000001101XH-z10XH-z11XH-zDisableInputInputOutputDIS4DIS200000011X1XH-z(Note1)1XXH-z(Note2)DisableInputInputOutputDIS4DIS200010010X1XH-z(Note1)1XXH-z(Note2)3•MM80C97•MM80C98AbsoluteMaximumRatings(Note3)Note3:“AbsoluteMaximumRatings”arethosevaluesbeyondwhichthesafetyofthedevicecannotbeguaranteed.Exceptfor“OperatingTempera-tureRange”theyarenotmeanttoimplythatthedeviceshouldbeoperatedattheselimits.Thetableof“ElectricalCharacteristics”providesconditionsforactualdeviceoperation.DCElectricalCharacteristicsMin/MaxlimitsapplyacrosstemperaturerangeunlessotherwisenotedVoltageatAnyPin-0.3VtoVCC+0.3VOperatingTemperatureRange-40°Cto+85°CStorageTemperatureRange-65°Cto+150°CPowerDissipation(PD)Dual-In-Line700mWSmallOutline500mWPowerSupplyVoltage(VCC)18VLeadTemperature(Soldering,10seconds)260°CSymbolParameterConditionsMinTypMaxUnitsCMOSTOCMOSVIN(1)Logical“1”InputVoltageVCC=5V3.5VVCC=10V8.0VVIN(0)Logical“0”InputVoltageVCC=5V1.5VVCC=10V2.0VVOUT(1)Logical“1”OutputVoltageVCC=5V4.5VVCC=10V9.0VVOUT(0)Logical“0”OutputVoltageVCC=5V0.5VVCC=10V1.0VIIN(1)Logical“1”InputCurrentVCC=15V0.0051.0μAIIN(0)Logical“0”InputCurrent-1.0-0.005μAIOZOutputCurrentinHighVCC=15V,VO=15V0.0051.0μAImpedanceStateVCC=15V,VO=0V-1.0-0.005μAICCSupplyCurrentVCC=15V0.0115μATTLINTERFACEVIN(1)Logical“1”InputVoltageVCC=4.75VVCC-1.5VVIN(0)Logical“0”InputVoltageVCC=4.75V0.8VVOUT(1)Logical“1”OutputVoltageVCC=4.75V,2.4VIO=-1.6mAVOUT(0)Logical“0”OutputVoltageVCC=4.75V,0.4VIO=1.6mAOUTPUTDRIVE(ShortCircuitCurrent)ISOURCEOutputSourceCurrentVCC=5V,VIN(1)=5V-4.35mATA=25°C,VOUT=0VISOURCEOutputSourceCurrentVCC=10V,VIN(1)=10V-20mATA=25°C,VOUT=0VISINKOutputSinkCurrentVCC=5V,VIN(0)=0V4.35mATA=25°C,VOUT=VCCISINKOutputSinkCurrentVCC=10V,VIN(0)=0V20mATA=25°C,VOUT=VCC•MM80C97•MM80C98ACElectricalCharacteristics(Note4)TA=25°C,CL=50pF,unlessotherwisenoted.Note4:ACParametersareguaranteedbyDCcorrelatedtesting.Note5:Capacitanceisguaranteedbyperiodictesting.Note6:CPDdeterminesthenoloadACpowerconsumptionofanyCMOSdevice.ForcompleteexplanationseeFamilyCharacteristicsapplicationnoteAN-90.ACTestCircuitsandSwitchingTimeWaveformstpd0,tpd1CMOStoCMOSt1HandtH1t1HSymbolParameterConditionsMinTypMaxUnitstpd0,tpd1PropagationDelayTimetoaLogical“0”orLogical“1”fromDataInputtoOutputMM80C95,MM80C97VCC=5V60100nsVCC=10V2540nsMM80C98VCC=5V70150nsVCC=10V3575nstpd0,tpd1PropagationDelayTimetoaLogical“0”orLogical“1”fromDataInputtoOutputMM80C95,MM80C97VCC=5V,CL=150pF85160nsVCC=10V,CL=150pF4080nsMM80C98VCC=5V,CL=150pF95210nsVCC=10V,CL=150pF45110nst1H,t0HDelayfromDisableInputtoHighImpedanceRL=10k,CL=5pFState,(fromLogical“1”orLogical“0”)MM80C95VCC=5V80135nsVCC=10V5090nsMM80C97VCC=5V70125nsVCC=10V5090nsMM80C98VCC=5V90170nsVCC=10V70125nstH1,tH0DelayfromDisableInputtoLogical“1”LevelRL=10k,CL=50pF(fromHighImpedanceState)MM80C95VCC=5V120200nsVCC=10V5090nsMM80C96VCC=5V130225nsVCC=10V60110nsMM80C98VCC=5V120200nsVCC=10V5090nsCINInputCapacitanceAnyInput(Note5)5.0pFCOUTOutputCapacitance3-STATEAnyOutput(Note5)11pFCPDPowerDissipationCapacitance(Note6)60pF5•MM80C97•MM80C98ACTestCircuitsandSwitchingTimeWaveforms(Continued)tH1t0HandtH0t0HtH0Note:Delaysmeasuredwithinputtr,tf≤20ns.TypicalPerformanceCharacteristicsPropagationDelayvsLoadCapacitanceΔtpd/pFvsPowerSupplyVoltageN-ChannelOutputDriveat25°CP-ChannelOutputDriv