高速串行总线测试技术发展

高速串行总线测试技术发展PHYValidationofThunderbolt&DisplayPortThunderboltOverviewHighSpeedDataBusforPC’s–BroughttomarketbyIntel/Applein2011–InteroperablewithDisplayPortThunderboltsignalingisdualNRZ(**/66bEncoded)–10.3125Gb/sdatarate–ItutilizesSFP+technologywith2diffTxandRxpairs.ThunderboltElectricalValidationThunderbolt(.5SpecRevision)10.3125GbpsTektronixDPOJETThunderbolt.5MOIManualTest}}TektronixDP12FulltestautomationDisplayPortDP1.2RBR(1.6Gbps),HBR(2.7Gbps)HBR2(5.4Gbps)Thunderbolt(futureInterop)DP++77DualPortDeviceComplianceTestSummaryPhysicalLayerTesting–(Rev0.7Spec)1.TBTTransmitterMOI2.TBTReceiverMOI3.TBTReturnLossMOI4.DPSourceMOI5.DP++(HDMI)SourceMOI6.PowerDeliveryMOIFunctionalTesting–ThunderboltFunctionalCTSRev3.0.11.ROMValidation2.BasicDeviceFunctionality3.EFI4.DownstreamDeviceFunctionality5.DownstreamDisplayFunctionality6.ExtendedTestFunctionality7.ComplexTopology8.DUTSpecificVerification9.NegativeTesting10.FirmwareUpdateValidationCTS–ComplianceTestSpecificationMOI–MethodofImplementation(TestProcedure)SinglePortDeviceComplianceTestSummaryPhysicalLayerTesting–(Rev0.7Spec)1.TBTTransmitterMOI2.TBTReceiverMOI3.TBTReturnLossMOI4.PowerConsumptionFunctionalTesting–ThunderboltFunctionalCTSRev2.4(IBL488434)1.ROMValidation2.BasicDeviceFunctionality3.EFI4.DUTSpecificVerification5.NegativeTesting6.FirmwareUpdateValidationCTS–ComplianceTestSpecificationMOI–MethodofImplementation(TestProcedure)PowerDeliveryTestingSetupHDMITestSetupDSA70804CorhigherSMADifferentialProbes–Provides3.3VbiasHT3HDMIComplianceSWMacorequivalenttoolusedtocontroldownstreamportona2portdeviceBothportstestedExampleofHDMIPassingResultsAutomatedThunderboltTxTestingRecommendedEquipment•DPO/DSA/MSO71604(≥16GHzBW)•BSA125C(crosstalksource)•OptionDJA(DPOJET)•OptionTBT-TX(TekExpress)•TF-TB-TPA-P(Plugfixture)&TBT-TPA-UH(portmicrocontroller)OptionTBT-TXComplianceAutomationSoftwareAutomatesscopesetup&compliancemeasurementspertheTekThunderboltMOIFasttestexecutionSimultaneoustwolanetestingAutomatedDUTstatecontrolfordevicesUser-selectabletestsCreatescompletetestreportThunderboltTransmitterTestingStep1:SelectMeasurementSetupThunderboltTransmitterTestingStep2:SelectMeasurementsThunderboltTransmitterTestingStep3:ConfigureAcquisitionsThunderboltTransmitterTestingStep4:StartTestsandGenerateReportTestChallenge:De-EmbeddingTransmitterComplianceTestingSignalatTP1MeasuredSignalApplyS-ParametersSignalwithFixtureEffectsRemovedTP1Host/devicecompliancepointatTP1(matedplug/receptacle)De-embeddingrequiredtoremovefixtureeffectsS-ParametersareacquiredfromcalibrationfixtureDUTTestFixtureThunderboltFixtureDe-EmbedresultsTestChallenge:CrosstalkMeasuringBoundedUncorrelatedJitter(BUJ)isCriticalInterconnectandboardlayouttechnologyisadvancingandthegreatestareaoffocusisinreducingtheinsertionlossandSignal-to-Crosstalkratio.TheimplicationsofcomplexchannelinteractioncanbeobservedandidentifiedbyexaminingthetypeandamountofBUJ.ThereisastrongCause–and-EffectrelationshipbetweenCrosstalkandBUJwhichoftengetsclassifiedasRandomifspecialstepsarenotobserved.BUJinrealtimejitteranalysisBUJinThunderboltexampleTJ@BER1,Math110.105psRJ1,Math1506.04fsPJ1,Math13.6968psDJ1,Math13.6968psNPJ1,Math1881.89fsTIE2,Math155.789fsRiseSlewRate1,Math19.2627V/nsTJ@BER1,Math19.9087psRJ1,Math155***1fsPJ1,Math12.6685psDJ1,Math12.6685psNPJ1,Math1592.92fsTIE2,Math189.108fsRiseSlewRate1,Math19.2542V/nsTJ@BER1,Math110.315psRJ1,Math1680.95fsPJ1,Math11.7365psDJ1,Math11.7365psTIE2,Math144.029fsRiseSlewRate1,Math19.3228V/nsTJ@BER1,Math111.159psRJ1,Math1694.31fsPJ1,Math12.82**psDJ1,Math12.82**psTIE2,Math1-25.694fsRiseSlewRate1,Math19.2843V/nsLegacyDecompositionNewBUJDecomposition2012/11/821DPOJET业内使用最简单的抖动测试工具“ONETouch”一键式的软件设计思路，任何抖动测量，无需复杂的设定，一键完成测试–自动选择示波器输入通道–自动判断测试信号类型(clock或data)–最优化完成示波器采集参数–自动测试参考电平–自动选择抖动项目(用户可定制)–自动完成测量项目参数设定–自动完成结果分析、图表生成“ONETouch”一键式功能使得工程师摆脱枯燥的、繁琐、易错的参数设置环节，直接将测试结果呈现在工程师面前！2012/11/822DPOJET业内测试内容最丰富的抖动测试工具测试内容丰富多样，包括抖动、眼图和各种时序测量支持各种测试标准、抖动分析模型–Tektronix专利的抖动分析模型–DualDirac抖动分析模型(PCIE2.0规范使用)–标准定义模板以及用户自定义模板最多可同时测试99个项目2012/11/823DPOJET测试举例－SSC测试SSC(SpreadSpectrumClock)–SSC目的是为了减小参考时钟对周围系统EMI的干扰，采用的人为将参考时钟进行FM调制，使其能量在一段频谱内平均，从而减小EMI。–目前流行的高速总线中都采用了SSC的设计–SSC的测试要求考察调制的幅度以及频率是否满足规范要求SSC测试时，需要对DPOJET测量的抖动(clock/dataperiod)进行低通滤波。如DisplayPort，滤波器是2阶、带宽1.98M的低通滤波器DisplayPort中SSC测试中滤波器的设置DisplayPort中SSC调制精度以及偏移测试DEMOStorageTimelinesandSolutionsDevelopmentToday2008200920102011Gen3-SiliconPhase6GIntegrationPhase–ProductDevelopment–SATAIOUnifiedTestDefinition1.4–FirstofficialtestingofGen3productsinJune2009DraftSpec6GDeploymentPhasePublicSpec6GRelease–CommercialGen3productdeployment.Gen2-SiliconPhase6GIntegrationPhaseDraftSpec6GDeploymentPhasePublicSpecRelease–Commercialproductdeployment.Gen3(12Gb/Sec)-SiliconPhase–SCSITradeAssociationGen2Plugfest(UNHIOL)–STAtestspecificationofSASreleased.2012IW#9/PF#14Taipei11/16SAS3firstSpecDraftIW#10/PF#15MilpitasCA05/16IW#11/PF#16Taipei03/2320132014IW#13/PF#18MilpitasCA10/14IW#14/PF#19Taipei03/038GSATA-ExpressIntegrationPhaseSATA3.2FirstInteropSATA-Ex