第5章_纳米CMOS

1第5章纳米CMOS纳米电子学庄奕琪主讲CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0本章概要1.1引言1.2纳米CMOS问题1.3纳米CMOS对策2CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0本章参考书„杜磊、庄奕琪，纳米电子学，电子工业出版社，2004.10，第章CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.1引言什么是CMOS？CMOS带来的好处„低功耗（静态功耗～0）„高电压摆幅（0～VDD）„高噪声容限（0～0.5VDD）„无电平损失3CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0栅氧化层场氧化层n阱CMOSIC剖面结构图1.1引言CMOS器件结构沟道长度CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.1引言走向纳米时代的CMOS2424222222202018最少掩膜版数目7-876-7665-654-5片上最大连线层数目1024800512512512512512封装管腿数目3.02.52.01.61.41.20.750.3时钟频率(GHz)0.5-0.60.6-0.90.9-1.21.2-1.51.2-1.51.5-1.81.8-2.53.3电源电压(V)1.01.51.5-22-32.4-3.23-44-57-12氧化层厚度(nm)500400400400300300200200硅园片直径(mm)180M84M39M18M10M6.2M3.7M微处理器规模(晶体管数/cm2)256G64G16G4G2G1G256M64M存储器规模(位/芯片)0.050.070.100.130.150.180.250.35最小特征尺寸(μm)20122009200620032001199919971995时间4CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.1引言纳米时代的集成电路CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.1引言纳米CMOS在IC发展进程中的位置5CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0InternationalTechnologyRoadmapforSemiconductorsYear2005201020152020MPUHalfPitch(nm)90452514MPUGateLength(nm)32181061.1引言纳米CMOS时代已经来临2004年东芝制作的6nmMOSFET的SEM照片10nmMOSFET的实验室样品特性CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.1引言常规纳米MOS管结构沟道长度和栅氧化层厚度进入nm量级6CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.1引言常规纳米CMOS结构CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题电源电压和阈值电压限制„电源电压↓„电场强度↓（E∝VDD/L)„动态功耗↓（P∝VDD2）„阈值电压↓„泄漏电流↑„静态功耗↑„阈值电压/电源电压↑„延迟时间↑„工作频率↓7CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题电源电压和阈值电压限制„电源电压↓„电场强度↓（E∝VDD/L)„动态功耗↓（P∝VDD2）„阈值电压↓„泄漏电流↑„静态功耗↑„阈值电压/电源电压↑„延迟时间↑„工作频率↓CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题栅电流限制„栅电流要求„栅总面积0.1cm2„电源电压～1V„栅电流密度1A/cm2„栅电流限制„栅氧化层厚度2nm„栅隧穿电流～1A/cm2„单管功耗～100mW8CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题阈值电压的量子效应栅氧化层厚度↓→硅表面电场↑→量子子带趋于硅导带底→硅表面势漂移→阈值电压↑CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题薄栅氧隧穿:现象当栅氧化层薄到1.5nm以下时，量子隧穿效应变得显著，隧穿电流可能成为栅氧漏电流的主要成分，为CMOS电路引入静态功耗并有可能产生误操作栅源隧穿电流栅沟隧穿电流栅漏隧穿电流9CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题薄栅氧隧穿:能带图Si-SiO2-Si隧穿Metal-SiO2-Si隧穿„硅导电电子隧穿至硅或金属的导带（ECB），需跨越势垒高度3.1eV„硅价带电子隧穿至硅或金属的导带（EVB），需跨越势垒高度4.2eV„硅或金属价带空穴隧穿至硅的价带（HVB），需跨越势垒高度4.5eVCopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题硅能带间隧穿:来源超短沟道器件采用二维非均匀掺杂来抑制短沟道效应，在沟道的高电场区有可能出现源-漏隧穿低掺杂区高掺杂区隧穿电流10CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题硅能带间隧穿:后果隧穿电流沟道长度↓10nm→漏源电场↑→隧穿电流↑逼近最大漏源泄漏电流CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题迁移率退化晶格散射机构（声子散射）为主表面散射机构（界面电荷散射、界面粗糙度散射）为主11CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题杂质随机分布效应„微米级CMOS：沟道中电离杂质很多→杂质分布近似均匀→阈值电压基本与空间位置无关„纳米级CMOS：沟道中电离杂质很少→杂质分布随机涨落→阈值电压随空间位置随机变化CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.2纳米CMOS问题互连线延迟„微米级连线：连线延迟受RC效应制约，正比于L，与寄生电感无关„纳米级连线：连线延迟受电磁波效应制约，正比于L2，与寄生电感有关12CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.3纳米CMOS对策解决途径展望硅基单栅绝缘体基单栅水平双栅垂直双栅25nmBulkMOSFETFDSOIUTBSOIFinFETHP(MPU)LOPLSTPStat.Sets230nmBulkMOSFETStandardSingleSetCopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.3纳米CMOS对策SOICMOS:结构体硅CMOSSOICMOSSOI：SemiconductorOnInsulator13CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.3纳米CMOS对策SOICMOS:前景SOI技术将延续CMOS的辉煌CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.3纳米CMOS对策SOICMOS:优点„消除了与Si衬底有关的pn结电容→工作速度↑„消除了与Si衬底有关的寄生双极晶体管→无闩锁、软误差等效应→可靠性↑14CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.3纳米CMOS对策SOICMOS:不足„浮体效应：沟道衬底无电极引出→衬底电位随偏压浮动→截止电流↑，漏-源击穿电压↓„散热问题；SiO2衬底热导率Si衬底热导率的1/100→最大耗散功率↓CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.3纳米CMOS对策SOICMOS:工艺离子掺杂（SIMOX）法50～100nm~400nm15CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.3纳米CMOS对策SOICMOS:工艺圆片键合法CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.0CopyrightbyYiqiZhuang2007V4.01.3纳米CMOS对策SOICMOS:分类„部分耗尽型（PD，PartiallyDepleted）„硅有源层厚度大于栅耗尽层厚度„亚阈特性陡峭→适于低电压工作，浮体效应强→短沟道特性差„完全耗尽型（FD，FullyDepleted）„硅有源层厚度小于栅耗尽层厚度„无浮体效应，极薄硅膜制作困难16Copyrigh