Calpella-Platform-Design-Guide-398905_2.0-酷睿CPU

Documentnumber:398905CalpellaPlatformDesignGuideForArrandale,ClarksfieldandMobileIntel®5SeriesChipsetSeptember2009Revision2.0IntelConfidential2IntelConfidentialPlatformDesignGuideINFORMATIONINTHISDOCUMENTISPROVIDEDINCONNECTIONWITHINTEL®PRODUCTS.NOLICENSE,EXPRESSORIMPLIED,BYESTOPPELOROTHERWISE,TOANYINTELLECTUALPROPERTYRIGHTSISGRANTEDBYTHISDOCUMENT.EXCEPTASPROVIDEDININTEL'STERMSANDCONDITIONSOFSALEFORSUCHPRODUCTS,INTELASSUMESNOLIABILITYWHATSOEVER,ANDINTELDISCLAIMSANYEXPRESSORIMPLIEDWARRANTY,RELATINGTOSALEAND/ORUSEOFINTELPRODUCTSINCLUDINGLIABILITYORWARRANTIESRELATINGTOFITNESSFORAPARTICULARPURPOSE,MERCHANTABILITY,ORINFRINGEMENTOFANYPATENT,COPYRIGHTOROTHERINTELLECTUALPROPERTYRIGHT.UNLESSOTHERWISEAGREEDINWRITINGBYINTEL,THEINTELPRODUCTSARENOTDESIGNEDNORINTENDEDFORANYAPPLICATIONINWHICHTHEFAILUREOFTHEINTELPRODUCTCOULDCREATEASITUATIONWHEREPERSONALINJURYORDEATHMAYOCCUR.Intelmaymakechangestospecificationsandproductdescriptionsatanytime,withoutnotice.Designersmustnotrelyontheabsenceorcharacteristicsofanyfeaturesorinstructionsmarked“reserved”or“undefined.”Intelreservestheseforfuturedefinitionandshallhavenoresponsibilitywhatsoeverforconflictsorincompatibilitiesarisingfromfuturechangestothem.Theinformationhereissubjecttochangewithoutnotice.Donotfinalizeadesignwiththisinformation.Theproductsdescribedinthisdocumentmaycontaindesigndefectsorerrorsknownaserratawhichmaycausetheproducttodeviatefrompublishedspecifications.Currentcharacterizederrataareavailableonrequest.I2Cisatwo-wirecommunicationsbus/protocoldevelopedbyPhilips.SMBusisasubsetoftheI2Cbus/protocolandwasdevelopedbyIntel.ImplementationsoftheI2Cbus/protocolmayrequirelicensesfromvariousentities,includingPhilipsElectronicsN.V.andNorthAmericanPhilipsCorporation.ThisdeviceisprotectedbyU.S.patentnumbers5,315,448and6,516,132,andotherintellectualpropertyrights.TheuseofMacrovision'scopyprotectiontechnologyinthedevicemustbeauthorizedbyMacrovisionandisintendedforhomeandotherlimitedpay-per-viewusesonly,unlessotherwiseauthorizedinwritingbyMacrovision.DevicesincorporatingMacrovision’scopyprotectiontechnologycanonlybesoldordistributedtocompaniesappearingonMacrovision’slistof“AuthorizedBuyers”at:®ActiveManagementTechnologyrequirestheplatformtohaveanIntel®AMT-enabledchipset,networkhardwareandsoftware,aswellasconnectionwithapowersourceandacorporatenetworkconnection.Withregardtonotebooks,IntelAMTmaynotbeavailableorcertaincapabilitiesmaybelimitedoverahostOS-basedVPNorwhenconnectingwirelessly,onbatterypower,sleeping,hibernatingorpoweredoff.Formoreinformation,see®TechnologyforspecifiedunitsofthisprocessoravailableQ2/06.SeetheProcessorSpecFinderat®HighDefinitionAudiorequiresasystemwithanappropriateIntelchipsetandamotherboardwithanappropriateCODECandthenecessarydriversinstalled.Systemsoundqualitywillvarydependingonactualimplementation,controller,CODEC,driversandspeakers.FormoreinformationaboutIntel®HDaudio,referto®TrustedExecutionTechnologyisasecuritytechnologyunderdevelopmentbyIntelandrequiresforoperationacomputersystemwithIntel®VirtualizationTechnology,anIntelTrustedExecutionTechnology-enabledprocessor,chipset,BIOS,AuthenticatedCodeModules,andanIntelorothercompatiblemeasuredvirtualmachinemonitor.Inaddition,IntelTrustedExecutionTechnologyrequiresthesystemtocontainaTPMv1.2asdefinedbytheTrustedComputingGroupandspecificsoftwareforsomeuses.See*Othernamesandbrandsmaybeclaimedasthepropertyofothers.Copyright©2008-2009,IntelCorporation.Allrightsreserved.PlatformDesignGuideIntelConfidential3Contents1Introduction............................................................................................................531.1DesignGuideDeltaOverview..............................................................................561.2Terminology.....................................................................................................591.3ReferenceDocuments........................................................................................612ProcessorDesignGuidelines....................................................................................652.1ExternalGraphicsUsingPCIExpress*Architecture................................................652.1.1DesignConsiderations.............................................................................652.1.1.1Differential-PairWidthandSpacing.............................................652.1.1.2TransmitterVoltageSwing.........................................................692.1.1