半导体制造流程与IC产业链简介

IntroductiononFabflowandsemiconductorindustry--forITrelatedemployeeMorrisL.YehPage2Outline1.FabflowandTransistorworking2.ICmanufacturingchain3.Filedapplication4.TheTrendPage3TheRoadmapFabProcessflowlLithographyconceptlDeviceoperationlFront-endprocesslBackendprocesslIntegrationDesignFlowlMarketpositioninglSystemdesignlSystemsynthesislSystemsimulationlLayout/masktoolingBackendFlowlWafersorting(C/Ptest)lbackgride/Diesawlwirebond/bumpinglAssemblylFinaltestlburn-inFieldApplicationvolatileMemory:SRAM,DRAMnon-volatileMemory:mROM,EPROM,E2PROM,Flash,SmartCard...ASIC:Logic,m-Controller,MPU,CPU,ChipSet,STB,Graphic,consumer,LCDmodule,mDisplay,CIS,...Mix-signal:RFRx/Tx,Cellular,BlueTooth,wireless,GPS.....ITroleplayDesign:lCADforDesignsupportlCADforsynthesislCADforlayoutlIPmanagementlSimulationFabandBackend:lMESrelated,SCMrelated,ERPrelated,CRMrelatedlProcesssimualtion,Devicesimulation,Metrologyandcharacteristicsmanagement,YieldManagement,TestingcapabilitylUniversalAutomationlInter/Intra.netcomunicationPage41.1TransistorWorking1.What’stheTransistor?2.What’stheTransistorstructure?3.How’sthetransistorworking?4.TransistorandSystemrevolution3.1How’stheclockrunninginthetransistorring?3.2How’stheinformationbroadcastinginasystem?Page51.What’stheTransistor?TransistorWorkingInDigitalapplication,thetransistorplaytheroleofswitchinthesystemjustlikeamechanicalswitch,itmeansthatthekeycomponenttostoragethe0and1State1State0ButwedeployedtheSolid-StateandQuantumphysicstorealizethesolid-stateswitch-Transistorinsiliconindustry,it’smoresizeshrinkage,highspeed,highperformanceandlowerenergyrequiredthanthepriorarts.State1State0Page62.What’stheTransistorstructure?TransistorWorkingGateOxideUMC.Fab8B.Generic0.25umlogicTi-SalicideProcessPolyTiSi2SpacerSourceDrainChannelLengthLDDPOLYThetransistorincluded3terminalwhichlikestheswitch:1.PolyGateplaytheroleofcontrolorinputterminal,theDrainplaytheroleofoutputterminalandtheSourceplaytheroleofreferenceorground.Page73.How’sthetransistorworking?TransistorWorkingState1DrainBias(charge)TimesLevel(V)State0GateBias(discharge)TimesLevel(V)State1DrainBias(recharge)TimesLevel(V)VoltageontheDrainterminal(output)=IntheDigitalapplication,thetransistorbehaviorsmorelikesaCapacitor:1.DrainBias(CapacitorCharge):ThechargestorageontheDrainside.2.GateBias(CapacitorDischarge):ThestoragechargeflowfromDraintoSource3.DrainBiasagain(Gatefloating,CapacitorRecharge):Thechargestorageagain.Page83.1How’stheclockrunninginthetransistorring?Thevideoshownthe49stagesNOTgateserieswhichconstructedtheringoscillator,IntheleftNOTgatediagram,iftheinputterminalbecomestate0,thePMOSwasturnON,andNMOSturnedoff,itmeansthattheVccflowintoOutputterminal,theOutputstatebecome1,andaccordingquantumphysics,thecurrentflowthechannelmeansthatelectron-holepairrecombination,andthelightemissionwillbedetectedbythecooledinfraredcamera.TheRingOscillatorwasthetooltomeasurethesystemclockandspeed.GNDVccOutputInputPMOSNMOSNOTGateState0OnOffState1State1OffOnState0Page93.2How’stheinformationbroadcastinginasystem?Generally,there’safewpeoplecouldunderstoodtheinformationbroadcastinginachip,especiallyonthesystemdebug,theproductengineerhardtodetectthedefectinsystemlevel.Theliquid-nitrogen-cooledinfraredCameracoulddetectthehotspotemissionwhichgeneratedbytheelectron-holepaircombination.Thedefectcouldbedetectedoncethesignalflowtothedefectnode,thesystemwillbeholdandhotspotfrozenonthedefectnode.Page10FIG.1.Thefirsttransistor.BrattainandBardeen'spnppoint-contactgermaniumtransistoroperatedasaspeechamplifierwithapowergainof18onDecember23,1947.(BellLabs,Lucent)GateOxidePolyTiSi2SpacerSourceDrainChannelLengthFIG.3.TheworldwidesmallesttransistorGatelength0.061um.(BellLabs,Lucent)FIG.2.TheUMCpostgeneration0.25umstandardtransistor(UMC)4.1TheTransistorrevolutionTheFirstTransistor1947Belllabs.TheUMC0.25umTransistor1999,UMCTheworldwideleadship2001Belllabs.LucentPage11DeviceIntegrationandTechnologydrivePage121.2Fabflow1.Lithographyconceptandcycle4.TransistorLayer(Front-end)definition5.RoutingLayer(Back-end)definition3.Modulecompositionandintegration2.ModuledefinitionPage13Lithographyconcept-physicalcyclePhotoResistCoatingMask&DUVStepperExposurePHOTOPhotoResistDevelopmentPHOTOEtching(Wet/Dry)PhotoResistStrippingETCHFilmDepositionRawmaterialThinFilmThinFilm-PHOTO-ETCHPhysicallayerformationcycleFabFlowPage14Lithographyconcept-ImplantcyclePhotoResistCoatingMask&DUVStepperExposurePHOTOPhotoResistDevelopmentPHOTOFurnacefilmgrowthRawmaterialDiffusionIonImplantPhotoResistStrippingDiffusionDiffusion-PHOTO-DiffusionImplantlayercycleFabFlowPage151.2Fabflow1.Lithographyconceptandcycle4.TransistorLayer(Front-end)definition5.RoutingLayer(Back-end)definition3.Modulecompositionandintegration2.ModuledefinitionPage16Photo:Rawmaterial:Reticle,PhotoResistEquipment:I-Line(MUV),DUV,EUV(Stepper,SCANNER)Vendors:Nikon,ASML2.Moduledefinition-PHOTOThePHOTOconceptwasgeneralOpticslithographytoreproducethespecificpatterns.TodaywedeployedtheUVExcimerlaserforthelight,AccordingtoOpticsprinciple,generallythewavelengthofthelights