GD25Q16BSIG或25Q16BVSIG

25Q16BSIG1FEATURES◆16M-bitSerialFlash◆Program/EraseSpeed-2048K-byte-PageProgramtime:0.7mstypical-256bytesperprogrammablepage-SectorErasetime:100mstypical-BlockErasetime:0.3/0.4/0.8stypical◆Standard,Dual,QuadSPI-ChipErasetime:16stypical-StandardSPI:SCLK,CS#,SI,SO,WP#,HOLD#-DualSPI:SCLK,CS#,IO0,IO1,WP#,HOLD#◆FlexibleArchitecture-QuadSPI:SCLK,CS#,IO0,IO1,IO2,IO3-Sectorof4K-byte-Blockof32/64/128K-byte◆HighSpeedClockFrequency-120MHzforfastreadwith30PFload◆LowPowerConsumption-DualI/ODatatransferupto180Mbits/s-20mAmaximumactivecurrent-QuadI/ODatatransferupto360Mbits/s-5uAmaximumpowerdowncurrent◆Software/HardwareWriteProtection◆AdvancedsecurityFeatures(1)-Writeprotectall/portionofmemoryviasoftware-16-BitCustomerID-Enable/DisableprotectionwithWP#Pin-SecurityArchitecture-ToporBottom,SectororBlockselection◆SinglePowerSupplyVoltage◆Minimum100,000Program/EraseCycles-Fullvoltagerange:2.7~3.6VNote:1.PleasecontactGigadevicefordetails.GENERALDESCRIPTIONTheGD25Q16(16M-bit)SerialflashsupportsthestandardSerialPeripheralInterface(SPI),andsupportstheDual/QuadSPI:SerialClock,ChipSelect,SerialDataI/O0(SI),I/O1(SO),I/O2(WP#),andI/O3(HOLD#).TheDualI/Odataistransferredwithspeedof180Mbits/sandtheQuadI/O&Quadoutputdataistransferredwithspeedof360Mbits/s.CONNECTIONDIAGRAMCS#SOWP#VSSTopViewVCCHOLD#SCLKSI8–LEADSOP/DIP12345678UniformSectorDualandQuadSerialFlashGD25Q162PINDESCRIPTIONPinNameI/ODescriptionCS#IChipSelectInputSO(IO1)I/ODataOutput(DataInputOutput1)WP#(IO2)I/OWriteProtectInput(DataInputOutput2)VSSGroundSI(IO0)I/ODataInput(DataInputOutput0)SCLKISerialClockInputHOLD#(IO3)I/OHoldInput(DataInputOutput3)VCCPowerSupplyBLOCKDIAGRAMSPICommand&ControlLogicHighVoltageGeneratorsPageAddressLatch/CounterStatusRegisterWriteControlLogicByteAddressLatch/CounterColumnDecodeAnd256-BytePageBufferWriteProtectLogicandRowDecodeFlashMemoryCS#SCLKSI(IO0)SO(IO1)HOLD#(IO3)WP#(IO2)UniformSectorDualandQuadSerialFlashGD25Q163MEMORYORGANIZATIONEachdevicehasEachblockhasEachsectorhasEachpagehas2M128/64/32K4K256bytes8K512/256/12816-pages51232/16/8--sectors16/32/64---blocksUNIFORMBLOCKSECTORARCHITECTUREGD25Q1664KBytesBlockSectorArchitectureBlockSectorAddressrange315111FF000H1FFFFFH………………4961F0000H1F0FFFH304951EF000H1EFFFFH………………4801E0000H1E0FFFH…………………………………………………………………………………………………………24702F000H02FFFFH………………32020000H020FFFH13101F000H01FFFFH………………16010000H010FFFH01500F000H00FFFFH………………0000000H000FFFHUniformSectorDualandQuadSerialFlashGD25Q164DEVICEOPERATIONSPIModeStandardSPITheGD25Q16featuresaserialperipheralinterfaceon4signalsbus:SerialClock(SCLK),ChipSelect(CS#),SerialDataInput(SI)andSerialDataOutput(SO).BothSPIbusmode0and3aresupported.InputdataislatchedontherisingedgeofSCLKanddatashiftsoutonthefallingedgeofSCLK.DualSPITheGD25Q16supportsDualSPIoperationwhenusingthe“DualOutputFastRead”and“DualI/OFastRead”(3BHandBBH)commands.ThesecommandsallowdatatobetransferredtoorfromthedeviceattwotimestherateofthestandardSPI.WhenusingtheDualSPIcommandtheSIandSOpinsbecomebidirectionalI/Opins:IO0andIO1.QuadSPITheGD25Q16supportsQuadSPIoperationwhenusingthe“QuadOutputFastRead”,”QuadI/OFastRead”,“QuadI/OWordFastRead”(6BH,EBH,E7H)commands.ThesecommandsallowdatatobetransferredtoorfromthedeviceatfourtimestherateofthestandardSPI.WhenusingtheQuadSPIcommandtheSIandSOpinsbecomebidirectionalI/Opins:IO0andIO1,andWP#andHOLD#pinsbecomeIO2andIO3.QuadSPIcommandsrequirethenon-volatileQuadEnablebit(QE)inStatusRegistertobeset.HoldTheHOLD#signalgoeslowtostopanyserialcommunicationswiththedevice,butdoesn’tstoptheoperationofwritestatusregister,programming,orerasinginprogress.TheoperationofHOLD,needCS#keeplow,andstartsonfallingedgeoftheHOLD#signal,withSCLKsignalbeinglow(ifSCLKisnotbeinglow,HOLDoperationwillnotstartuntilSCLKbeinglow).TheHOLDconditionendsonrisingedgeofHOLD#signalwithSCLKbeinglow(IfSCLKisnotbeinglow,HOLDoperationwillnotenduntilSCLKbeinglow).TheSOishighimpedance,bothSIandSCLKdon’tcareduringtheHOLDoperation,ifCS#driveshighduringHOLDoperation,itwillresettheinternallogicofthedevice.Tore-startcommunicationwithchip,theHOLD#mustbeathighandthenCS#mustbeatlow.Figure1.HoldConditionHOLDHOLDCS#SCLKHOLD#UniformSectorDualandQuadSerialFlashGD25Q165DataProtectionTheGD25Q16providethefollowingdataprotectionmethods:◆WriteEnable(WREN)command:TheWRENcommandissettheWriteEnableLatchbit(WEL).TheWELbitwillreturntoresetbythefollowingsituation:-Power-Up-WriteDisable(WRDI)-WriteStatusRegister(WRSR)-PageProgram(PP)-SectorErase(SE)-BlockErase(BE)-ChipErase(CE)◆SoftwareProtectionMode:TheBlockProtect(BP4,BP3,BP2,BP1,BP0)bitsdefinethesectionofthememoryarraythatcanbereadbutnotchange.◆HardwareProtectionMode:WP#goinglowtoprotectedtheBP0~BP4bitsandSRP0~1bits.◆DeepPower-DownMode:InDeepPower-DownMode,allcommandsareignoredexcepttheReleasefromDeepPower-DownModecommand.Table1.GD25Q16ProtectedareasizeStatusRegisterContentMemoryContentBP4BP3BP2BP1BP0BlocksAddressesDensityPortionXX000NONENONENONENONE00001311F0000H-1FFFFFH64KBUpper1/320001030to311E0000H-1FFFFFH128KBUpper1/160001128to311C0000H-1FFFFFH256KBUpper1/80010024to31180000H-1FFFF