STM8by2010-11-11rose_yiyong@163.comDecember2009DocID14024Rev21/37UM0470UsermanualSTM8SWIMcommunicationprotocolanddebugmoduleIntroductionThismanualhasbeenwrittenfordeveloperswhoneedtobuildprogramming,testingordebuggingtoolsfortheSTM8microcontrollerfamily.ItexplainsthedebugarchitectureoftheSTM8core.TheSTM8debugsystemconsistsoftwomodules:●DM:Debugmodule●SWIM:SinglewireinterfacemoduleRelateddocumentation:●STM8SFlashprogrammingreferencemanual(PM0051)●STM8LFlashprogrammingmanual(PM0054)6:,0ඹ໘࿐ۤԸೋ੦ࣖဈܜ್Јࠚ670ฑࣅᄥ୶ޥᆢԅЉೋݧԸೋٝࠓೄॴVWPઝۢԸೋຂࠒٲ670Ըೋຂහဎ०ّ੦ࣖᆦюԸೋ੦ࣖӦຬࠄࣇ੦ࣖ༛೭ำӶ·ำԛసჃဎ֪࿒ēܮைڜӖఃฉဖĈrose_yiyong@163.comContentsUM04702/37DocID14024Rev2Contents1Debugsystemoverview......................................62Communicationlayer........................................73Singlewireinterfacemodule(SWIM)...........................83.1Operatingmodes............................................83.2SWIMentrysequence........................................93.3Bitformat.................................................113.3.1Highspeedbitformat.......................................113.3.2Lowspeedbitformat.......................................123.4SWIMcommunicationprotocol.................................133.5SWIMcommands...........................................143.5.1SRST:systemreset........................................143.5.2ROTF:readonthefly......................................143.5.3WOTF:writeonthefly......................................153.6SWIMcommunicationreset...................................153.7CPUregisteraccess.........................................163.8SWIMcommunicationinHaltmode.............................163.9Physicallayer..............................................173.10STM8SWIMregisters.......................................183.10.1SWIMcontrolstatusregister(SWIM_CSR)......................183.10.2SWIMclockcontrolregister(CLK_SWIMCCR)...................194Debugmodule(DM)........................................204.1Introduction...............................................204.2Mainfeatures..............................................204.3Debug....................................................224.3.1Reset...................................................224.3.2Breakpoints..............................................224.3.3Abort...................................................224.3.4Watchdogcontrol..........................................224.3.5InteractionwithSWIM......................................224.4Breakpointdecodingtable....................................23UM0470ContentsDocID14024Rev23/374.5Softwarebreakpointmode....................................244.6Timingdescription..........................................244.7Abort.....................................................244.8Databreakpoint............................................254.9Instructionbreakpoint........................................254.10Stepmode................................................254.11Applicationnotes...........................................264.11.1IllegalMemoryaccess......................................264.11.2Forbiddenstackaccess.....................................264.11.3DMbreak................................................264.12DMregisters...............................................274.12.1DMbreakpointregister1extendedbyte(DM_BKR1E).............274.12.2DMbreakpointregister1highbyte(DM_BKR1H).................274.12.3DMbreakpointregister1lowbyte(DM_BKR1L)..................274.12.4DMbreakpointregister2extendedbyte(DM_BKR2E).............284.12.5DMbreakpointregister2highbyte(DM_BKR2H).................284.12.6DMbreakpointregister2lowbyte(DM_BKR2L)..................284.12.7DMcontrolregister1(DM_CR1)..............................294.12.8DMcontrolregister2(DM_CR2)..............................304.12.9DMcontrol/statusregister1(DM_CSR1).......................314.12.10DMcontrol/statusregister2(DM_CSR2).......................324.12.11DMenablefunctionregister(DM_ENFCTR).....................334.12.12SummaryofSWIM,DMandcoreregistermaps..................34AppendixADescriptionoftheDM_ENFCTRregisterforeachSTM8product...................................35Revisionhistory....................................................36ListoftablesUM04704/37DocID14024Rev2ListoftablesTable1.SWIMcommandsummary.................................................14Table2.CPUregistermemorymappinginSTM8......................................16Table3.SWIMpincharacteristics..................................................17Table4.Decodingtableforbreakpointinterruptgeneration...............................23Table5.STM8registers..........................................................34Table6.PeripheralswhicharefrozenbythebitsoftheDM_ENFCTRregisterforeachSTM8product....................................................35Table7.Documentrevisionhistory.................................................36UM0470ListoffiguresDocID14024Rev25/37ListoffiguresFigure1.Debugsystemblockdiagram.........................................