ST_mos

PowerMOSFETapplicativeguidelinesinSBCPowerTransistorsDivisionApplications&MarketDevelopmentDepartmentLVApplicationAnalysisTeam09/05/20112Synchronousbuckconverter:mainkeypoints(1/3)VOUTVIN(“step-down”converter)D=VOUT/VIN(dutycycle)Q1:mainswitch(or“controlFET”or“HighSide”FET)Q2:synchronousrectifier(or“LowSide”FET)CIN:input(or“bulk”)capacitorLOUT–COUT:outputL-CfilterFig.1–Synchronousbuckconverterschematic(singlephase)INVOUTVQ1Q2CINCOUTLOUT3Fig.2–Synchronousbuckconverterschematic(singlephase)INVOUTVQ1Q2CINCOUTLOUTSynchronousbuckconverter:mainkeypoints(2/3)11:Q1on–Q2off2:Q1off-Q2off(dead-time);theloadcurrentflowsthroughtheQ2body-draindiode(VDS,Q2=-0.7V)3:Q1off–Q2on4:Q1off–Q2off:theloadcurrentflowsthroughtheQ2body-draindiode(VDS,Q2=-0.7V)234Fig.3–Simplifiedsynchronousbuckconverterwaveforms4Synchronousbuckconverter:mainkeypoints(3/3)Fig.4–CPU3-phasesVRMschematicTypicalCPUVRMfeatures:Multi-phaseSBC(toreducetheIOUTripple,seebelowfigure3)fSW=150kHz600kHz-1MHz(foreachphase)RCsnubbernetwork(tosmooththephasenoderinging)1ormoreparalleledLS(toreduceRDSonandLSconductionlosses)Fig.5–Multi-phaseSBCwaveforms5sw2INSCHOTTKYSCHfVC21P2OUTDSonCONDIDRP)tt(fIVPfrswLINSWswGGGGATEfVQPswINrrQrrfVQ21Psw2INOSSCossfVC21PSCHQrrGATECossSWCONDHSPPPPPPPOnlyifthereisaparalleledSchottkydiodewiththeLSFET(CSCHOTTKYhastobechargedduringHSturn-on)H-SL-SINVOUTVHighSideFET-PowerlossesevaluationFig.6–Synchronousbuckconverterschematic(singlephase)LSbody-draindiodereverserecoverypowerlosses6HighSideFET-OptimaldevicechoiceforVRMsapplicationsFig.7–Synchronousbuckconverterschematic(singlephase)LowQG(totalgatecharge)tominimizeHSswitching/gatedrivelossesSuitableRG(intrinsicgateresistance)LowVTH(thresholdvoltage)and5Vdriveoptimization,toreduceHStotalgatechargeLowRth(thermalresistance)forabetterthermalmanagementForhigherDvalues,lowRDSon(onstatedrain-sourceresistance)isimportanttominimizetheconductionlosses7QG,SWandfSWimpactontheefficiency(1/3)TestingboardBV[V]Rdson[mOhm]Qg,sw[nC]HighSide1309.2/10.56.85HighSide2307.3/8.34.65HighSide3307.6/9.59.25HighSide4307.0/9.07MOSFETelectricalparametersBoardsetupVIN=12V–VOUT=1.5V–IOUT,MAX=44A1xHS–2xLSRG,HS=RG,LS=2.2ohm–NORCsnubber8QG,SWandfSWimpactontheefficiency(2/3)EfficiencycomparisonBV[V]Rdson[mOhm]Qg,sw[nC]HighSide1309.2/10.56.85HighSide2307.3/8.34.65HighSide3307.6/9.59.25HighSide4307.0/9.07MOSFETelectricalparametersHighSide2showsthebestefficiencyperformancesinthewholecurrentrange,duetoswitchinglossesminimization9QG,SWandfSWimpactontheefficiency(3/3)Efficiency@300kHzBV[V]Rdson[mOhm]Qg,sw[nC]HighSide1309.2/10.56.85HighSide2307.3/8.34.65HighSide3307.6/9.59.25HighSide4307.0/9.07MOSFETelectricalparametersThelowestQG,SWdevicehasthehighestefficiencywhenfSWincreases.Efficiency@440kHz10QG,SWimpactontheswitchingbehaviour(1/2)TestingboardBoardsetupVIN=12V–VOUT=1.5V–IOUT,MAX=44A1xHS–2xLSRG,HS=RG,LS=2.2ohm–NORCsnubber11HSVDS–LowCrss(76pF)FETQG,SWimpactontheswitchingbehaviour(2/2)HSVDS-HighCrss(180pF)FETThehigherisCrss,theloweraredVDS,HS/dtandVDS,HS(max)QG,SWandMillercapacitanceshouldbeagoodtrade-offbetweenefficiencyimprovementathighfSWandHSmaximumvoltagestressreduction12HSgatedrivenetworkoptimization(1/2)AsymmetricgatedriverRG1:turn-onresistorRG1//RG2:turn-offresistorDisforwardbiasedwhentheHSFETisturningoffAsymmetricgatedriveisveryusefultooptimizetheHSswitchingbehavior,withoutdecreasingthesystemefficiency.WhentheHSturns-on,Disinoffstate,soRG1istheturn-onresistor.ThisresistancecouldbehighenoughtoreducethephasenodespikeWhentheHSturns-off,Disforwardbiased,soRG1//RG2istheturn-offresistor.Inthisway,itispossibletominimizetheswitchinglosses,enhancingtheefficiency.13HSgatedrivenetworkoptimization(2/2)StandardconfigurationAsymmetricgatedrivePhasenodespikeimprovementandefficiencyenhancementduetoasymmetricgatedrivenetwork14GATEswDCONDLSPPPPPInfactLSFETswitchesatnearlyzerovoltage2OUTswdeadtimeDSonCONDIftD1RP0PSWswdeadtimeLFCOND,DIODEftIVPH-SL-SINVswGGGGATEfVQPLowSideFET-PowerlossesevaluationFig.8–Synchronousbuckconverterschematic(singlephase)15LowSideFETOptimaldevicechoiceforVRMsapplicationsFig.9–Synchronousbuckconverterschematic(singlephase)LowRDSon(onstatedrain-sourceresistance)tominimizeLSconductionlossesCrssandCissvalueshavetobeagoodtrade-offbetweenphasenoderingingminimizationandCdv/dtimmunityimprovementLowRth(thermalresistance)forabetterthermalmanagementLowQrr(reverserecoverycharge)toreducePQrrandphasenodeovershootSuitableRG(intrinsicgateresistance)toavoidCdV/dtspuriousG-Svoltagebouncing(atHSturn-on)LowVF,DIODE(body-draindiodeforwardvoltagedrop)toreducediodeconductionlosses(duringdead-time)16RDSonandconductionlossesminimization(1/2)BoardsetupVIN=12V–VOUT=1.5V–IOUT,MAX=75A2xHS–2xLSRG,HS=RG,LS=2.2ohm–RCsnubberMOSFETelectricalparameters17RDSonandconductionlossesminimization(2/2)RDSonimprovementmakesLS2winningintermsofefficiency18LSbody-draindiodeQRR(reverserecoverycharge)(1/3)BoardsetupVIN=12V–VOUT=1.25V–IOUT,MAX=20A1xHS–1xLSRG,HS=2.2ohm-RG,LS=1.8ohm–RCsnubberMOSFETelectricalparametersLSFETsrecoverycurrentcurves19LSbody-dr