3数字电子基础-TTL和CMOS门电路

本章内容二极管三极管TTL门电路MOS管CMOS门电路南京大学金陵学院—肇莹Diode•ThestructureofSiliconandGermaniumatom二极管硅和锗半导体的结构+4+4+4+4纯净的硅或锗半导体二极管价电子纯净半导体又叫“本征半导体”+4+4+4+4自由电子空穴共价键中的电子二极管在纯净半导体中，电子和空穴是成对出现的纯金半导体中的电流非常小，大概10-9A)成为正离子N型半导体多数载流子是电子少数载流子空穴的浓度与温度有关多数载流子的浓度与温度无关+4+4+4+4+5多余电子磷磷称作“施主杂质”+4+4+4硼空穴负离子P型半导体多数载流子是空穴少数载流子电子的浓度与温度有关多数载流子空穴的浓度与温度无关，与掺杂浓度有关少数载流子电子+4+3硼是受主杂质－－－－－－－－－－－－－－－－－－－－－－－－P型半导体++++++++++++++++++++++++N型半导体掺杂的半导体处于电中性状态掺杂的半导体称作“非本征半导体”－－－－－－－－－－－－－－－－－－－－－－－－p++++++++++++++++++++++++n耗尽层空穴漂移电子漂移空穴扩散电子扩散阈值二极管的V—I特性曲线正向偏置反向偏置击穿电压雪崩击穿PN+-IVSIPN+-)1(TDVSDeII阳极阴极DV2V.0V7.0TT锗半导体的开启电压硅半导体的开启电压RVDOnOnOffKRRKOff二极管的开关特性曲线二极管的动态特性RVDOnOffVitt'Li理想状态下tLi实际上三极管的工作状态饱和:CCCCSBSBSbBERVIIIiVV,,7.0截止VVVVCESBES3.01.0,7.0VVBE5.0CCCECBVViI,0,0OViVCCVCRKRBRBBV0V0V二极管与门.+VCCRD1D2ABF000101110100ABFInputOutput功能表F=AB.F&AB0V5V5V5V二极管或门0V0V0001110110V5V5V5V110真值表ABFInputOutputF=A+BF+ABRABF10截止饱和“0”+VCC-VBBARKRBRCFVT真值表InputOutputAF10“1”“1”“0”三极管非门1AF逻辑函数：F=ATTL非门(74x)=5VVIH=3.4VVIL=0.2VTTL非门(74x)=5VILIVv0.9V负载电流VVVVVVVvRDBERCCOHO4.37.07.052242TTL非门(74x)=5VIHIVv4.1V2.1VVVvOLO3.0~1.0TTL非门(74x)传输特性曲线测试电路&+5VViVoVVTTL非门(74x)传输特性曲线VOHTypicalvalue=3.4V，Usually2.4VisOKVOLTypically0.3V，0.8VisOKTH(Threshold阈值)TTL非门(74x)(min)(min)IHOHNHVVV(max)(max)OLILNLVVVVVVVVVVVVVVNHNLILIHOLOH4.0,8.0,0.2,4.0,4.2,74(max)(min)(max)(min)所以，对于高电平输出特性(TTL非门)OHOVV低电平输出特性(TTL非门)OLOVVmARVVVIVIiVVILbeCCISIIHII1/)(,0,4.11时当即反向漏电流时当TTL非门输入特性输入电流KRVVVVRRRRVVRViibeCCiiibeCCii91.0)()()(,(max)22112因此TTL非门输入特性Vi2RiVCCVVVVVILICC8.0,5(max)假设VO2RiVO1Vi2VVCC5驱动负载的能力(TTL非门)灌电流负载T4截止T5饱和OLVLCII5ISCnII5ISIISIT5饱和程度越深，驱动负载的能力越强例如,LS-TTL(Low-powerSchottkyTTL)低电平输出状态下能提供8mA电流驱动负载的能力(TTL非门)VVCC5T4导通T5截止OHVLIIHLnIIIHIIHI拉电流负载比如,LS-TTL在高电平输出状态下只能提供电流A400传输延迟时间(TTL非门)tpd约为10ns~40ns传输延迟时间2PLHPHLpdtttICCL,ICCHandICCMTTL与非门e1e2bc如何计算下面几种情况下的输入电流?(1)A=B=VIL(2)A=B=VIH(3)A=VILB=VIHTTL门电路多于输入端的处理CCVRminIHIHCCVRIVRmaxILILVRI多于输入端不要悬空，要适当处理对于或门对于非门OC门(集电极开路门)输出端能够直接“线与”吗？不能OC门OC门'CCOHVVCDABCDABYYY21OC门IHOHOHCCLLIHOHCCLRLCCOHmInIVVRRmInIVRIVVminmax')(''所有OC门都截止OC门ILOLOLCCLILLOLCCILRLOLImIVVRImRVVnIII''''maxmin只有一个OC门导通的情况三态门三态门的应用三态门的应用TTL系列门电路7400-series74H(HighspeedTTL)74L(Low-powerconsumptionTTL)74LS(Low-powerSchottkyTTL)74AS(AdvancedSchottkyTTL)74ALS(AdvancedLow-powerSchottkyTTL)74F(FastTTL)74S(SchottkyTTL):肖特基势垒三极管为什么TTL门电路的传输时间长?VVBE7.0VVCE3.0VVBC4.0+-+-+-+-+-+-VVWhenBC4.0肖特基二极管导通,分流一部分基极电流，因此三极管不会进入到深度饱和状态74S系列与非门VreachcanVOL5.0(max)PowerconsumptionNMOS管SourceDrainNMOS管GateSourceDrainN+N+P-typesiliconGateoxideSubstrateDepletionlayer增强型NMOS场效应管DSG逻辑符号DSGorPMOS管GateSourceDrainPPN-typesiliconGateoxideSubstrateDepletionlayerSDGSDGor增强型PMOS场效应管0GSVNMOS管的工作原理GSDN+N+P-typesiliconSubstrateGSDN+P-typesiliconSubstrateN+TGSVV反型层910可达到DSRthGSGSvONVvKRDS210NMOS管的工作原理GSDN+P-typesiliconSubstrateN+iDDSVDiGSDN+P-typesiliconSubstrateN+夹断状态DSVDi保持不变21thGSGSDSDVvIiVDSiDNon-saturationSaturationVGSVGS(th)IncreasingVGSNMOS管的I-V特性NMOS管的工作原理)(thGSGSVvIf)()(thGSGDDthGSGVvvVv)()(thGSGDDthGSGVvvVv非常小dsR导通状态可分为两个工作区域：:-----线性区:-----饱和区MOSFET处在导通状态thGSGSVvIfMOSFET处在截止工作状态610至少非常大，dsRVDSiDNon-saturationSaturationIncreasing|VGS|PMOS管的I-V特性)(0thGSGSGSVvvVDD=+5.0VT2p-channelT1n-channelVOUTVINCMOS反相器VINT1T2VOUT0.0V(L)5.0V(H)offoffonon5.0V(H)0.0V(L)功能表CMOS反相器的静态工作特性传输特性曲线)2()1()2()1()()()()(,TOFFTOFFTONTONPthGSNthGSPthGSNthGSDDRRRRVVVVVVTHVDD=+5.0VT2p-channelVOUTVINT1n-channelCMOS反相器的静态工作特性HIGHLOWABNORMALVDD0.7VDD0.3VDD0VOHminVIHminHigh-stateDCnoisemarginVILmaxVOLmaxLow-stateDCnoisemargin直流噪声容限VgroundVOL1.0maxVVVDDOH1.0minCMOS反相器的直流噪声容限CMOS反相器的静态工作特性CC4000系列74HC系列CMOS反相器的静态工作特性CC4000特性74HC系列CMOS反相器的静态工作特性CMOS反相器的输出特性CMOS反相器的静态工作特性CMOS反相器的输出特性CMOS与非门VDDABFT1T2T4T3FHHHLAT1T2offoffononBT3T4LLLLHHHHoffoffononononoffoffonoffoffon功能表CMOS或非门VDDABFT1T2T4T3FHLLLAT1T2offoffononBT3T4LLLLHHHHoffoffononononoffoffonoffoffon功能表3输入与非门VDDABT1T2T4T3CT5T6FCMOS与非门（带有输入输出缓冲极）ABBAYCMOS或非门（带有输入输出缓冲极）BABAYVDDABT1T2T4T3OD门（OpenDrainGate）VDDABT1T2T4T3CD1011FOD门mAIVVWhenLOOL50,5.0max21~0,~0DDODDIVVVVABYOD门VVDD51V4.0mA4.0mA4.0mA4HCTOD门00000011KIRmAIRR5.14.052.324.04maxminmaxLS-TTLgatesOD门VVDD51V4.2A20A5HCTOD门LS-TTLA20A5A5A5KIRAIRR434.256020254maxmaxmax传输门EN_LENPMOSNMOSBA0_)1(LENandVENDDTPVTNDDVVDDVONTNONTPONallTTPN,TPAPTNDDATNADDNVVONTVVVVVVONT::OFFallTTLENENPN&1_,0)2(传输门的应用三态门CMOS门电路多余输入端的处理V5XXZZZK1K1X(a)(b)(c)CMOS门电路的正确使用CMOS门电路的正确使用mAVRDDp1/CMOS门电路的锁定效应CMOS门电路中的锁定效应CMOS门电路4000系列VHC(Veryhigh-speedCMOS)andVHCT(VeryHigh-speedCMOSTTLcompatible)系列HC(High-speedCMOS)和HCT(High-speedCMOSTTLcompatible).VOHmin=3.84VVIHmin=3.5VVILmax=1.5VVOLmax=0.33VVCC=5.0V0.0VHIGHLOWHClogiclevelsABNORMALABNORMALVOHmin=3.84VVIHmin=2.0VVILmax=0.8VVOLmax=0.33VVCC=5.0V0.0VHIGHABNORMALLOWCMOS门电路HCTlogiclevelsCMOS/TTL门电路的兼容问题3.85(HC,VHC)2.0(LS,S,ALS,HCT,VHCT)1.35(HC,VHC)0.8(LS,S,ALS,HCT,VHCT)0(HC,HCT)3.84(VHC,VHCT)3.80(LS,S,ALS)2.7(LS,ALS,S)0.55(VHC,VHCT)0.44(