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1、外文原文（复印件）A:FundamentalsofSingle-chipMicrocomputerThesingle-chipmicrocomputeristheculminationofboththedevelopmentofthedigitalcomputerandtheintegratedcircuitarguablythetowmostsignificantinventionsofthe20thcentury[1].Thesetowtypesofarchitecturearefoundinsingle-chipmicrocomputer.Someemploythesplitprogram/datamemoryoftheHarvardarchitecture,shownin-5A,othersfollowthephilosophy,widelyadaptedforgeneral-purposecomputersandmicroprocessors,ofmakingnologicaldistinctionbetweenprogramanddatamemoryasinthePrincetonarchitecture,shownin-5A.Ingeneraltermsasingle-chipmicrocomputerischaracterizedbytheincorporationofalltheunitsofacomputerintoasingledevice,asshowninFig3-5A-3.-5A-1AHarvardtype-5A.AconventionalPrincetoncomputerProgrammemoryDatamemoryCPUInput&OutputunitmemoryCPUInput&OutputunitResetInterruptsPowerFig3-5A-3.PrincipalfeaturesofamicrocomputerReadonlymemory(ROM).ROMisusuallyforthepermanent,non-volatilestorageofanapplicationsprogram.Manymicrocomputersandmicrocontrollersareintendedforhigh-volumeapplicationsandhencetheeconomicalmanufactureofthedevicesrequiresthatthecontentsoftheprogrammemorybecommittedpermanentlyduringthemanufactureofchips.Clearly,thisimpliesarigorousapproachtoROMcodedevelopmentsincechangescannotbemadeaftermanufacture.Thisdevelopmentprocessmayinvolveemulationusingasophisticateddevelopmentsystemwithahardwareemulationcapabilityaswellastheuseofpowerfulsoftwaretools.SomemanufacturersprovideadditionalROMoptionsbyincludingintheirrangedeviceswith(orintendedforusewith)userprogrammablememory.Thesimplestoftheseisusuallydevicewhichcanoperateinamicroprocessormodebyusingsomeoftheinput/outputlinesasanaddressanddatabusforaccessingexternalmemory.ThistypeofdevicecanbehavefunctionallyasthesinglechipmicrocomputerfromwhichitisderivedalbeitwithrestrictedI/Oandamodifiedexternalcircuit.TheuseoftheseROMlessdevicesiscommoneveninproductioncircuitswherethevolumedoesnotjustifythedevelopmentcostsofcustomon-chipROM[2];therecanstillbeasignificantsavinginI/Oandotherchipscomparedtoaconventionalmicroprocessorbasedcircuit.MoreexactreplacementforROMdevicescanExternalTimingcomponentsSystemclockTimer/CounterSerialI/OPrarallelI/ORAMROMCPUbeobtainedintheformofvariantswith'piggy-back'EPROM(ErasableprogrammableROM)socketsordeviceswithEPROMinsteadofROM。ThesedevicesarenaturallymoreexpensivethanequivalentROMdevice,butdoprovidecompletecircuitequivalents.EPROMbaseddevicesarealsoextremelyattractiveforlow-volumeapplicationswheretheyprovidetheadvantagesofasingle-chipdevice,intermsofon-chipI/O,etc.,withtheconvenienceofflexibleuserprogrammability.Randomaccessmemory(RAM).RAMisforthestorageofworkingvariablesanddatausedduringprogramexecution.Thesizeofthismemoryvarieswithdevicetypebutithasthesamecharacteristicwidth(4,8,16bitsetc.)astheprocessor,Specialfunctionregisters,suchasstackpointerortimerregisterareoftenlogicallyincorporatedintotheRAMarea.ItisalsocommoninHarardtypemicrocomputerstotreattheRAMareaasacollectionofregister;itisunnecessarytomakedistinctionbetweenRAMandprocessorregisterasisdoneinthecaseofamicroprocessorsystemsinceRAMandregistersarenotusuallyphysicallyseparatedinamicrocomputer.Centralprocessingunit(CPU).TheCPUismuchlikethatofanymicroprocessor.Manyapplicationsofmicrocomputersandmicrocontrollersinvolvethehandlingofbinary-codeddecimal(BCD)data(fornumericaldisplays,forexample),henceitiscommontofindthattheCPUiswelladaptedtohandlingthistypeofdata.Itisalsocommontofindgoodfacilitiesfortesting,settingandresettingindividualbitsofmemoryorI/Osincemanycontrollerapplicationsinvolvetheturningonandoffofsingleoutputlinesorthereadingthesingleline.Theselinesarereadilyinterfacedtotwo-statedevicessuchasswitches,thermostats,solid-staterelays,valves,motor,etc.Parallelinput/output.Parallelinputandoutputschemesvarysomewhatindifferentmicrocomputer;inmostamechanismisprovidedtoatleastallowsomeflexibilityofchoosingwhichpinsareoutputsandwhichareinputs.Thismayapplytoallorsomeoftheports.SomeI/Olinesaresuitablefordirectinterfacingto,forexample,fluorescentdisplays,orcanprovidesufficientcurrenttomakeinterfacingothercomponentsstraightforward.SomedevicesallowanI/Oporttobeconfiguredasasystembustoallowoff-chipmemoryandI/Oexpansion.Thisfacilityispotentiallyusefulasaproductrangedevelops,sincesuccessiveenhancementsmaybecometoobigforon-chipmemoryanditisundesirablenottobuildontheexistingsoftwarebase.Serialinput/output.Serialcommunicationwithterminaldevicesiscommonmeansofprovidingalinkusingasmallnumberoflines.Thissortofcommunicationcanalsobeexploitedforinterfacingspecialfunctionchipsorlinkingseveralmicrocomputerstogether.Boththecommonasynchronoussynchronouscommunicationschemesrequireprotocolsthatprovideframing(startandstop)information.ThiscanbeimplementedasahardwarefacilityorU(S)ART(Universal(synchronous)asynchronousreceiver/transmitter)relievingtheprocessor(andtheapplicationsprogrammer)ofthislow-level,time-consuming,detail.tismerelynecessarytoselectedabaud-rateandpossiblyotheroptions(numberofstopbits,parity,etc.)andload(orreadfrom)theserialtransmitter(orreceiver)buffer.Serializationofthe