Cortex-M3 权威指南_EN

TheDefinitiveGuidetotheARMCortex-M3ThispageintentionallyleftblankTheDefinitiveGuidetotheARMCortex-M3JosephYiuAMSTERDAM�BOSTON�HEIDELBERG�LONDON�NEWYORKOXFORD�PARIS�SANDIEGO�SANFRANCISCOSINGAPORE�SYDNEY�TOKYONewnesisanimprintofElsevierPrelims-H8534.inddiiiPrelims-H8534.inddiii7/19/071:38:43PM7/19/071:38:43PMNewnesisanimprintofElsevier30CorporateDrive,Suite400,Burlington,MA01803,USALinacreHouse,JordanHill,OxfordOX28DP,UKCopyright©2007,ElsevierInc.Allrightsreserved.Nopartofthispublicationmaybereproduced,storedinaretrievalsystem,ortransmittedinanyformorbyanymeans,electronic,mechanical,photocopying,recording,orotherwise,withoutthepriorwrittenpermissionofthepublisher.PermissionsmaybesoughtdirectlyfromElsevier’sScience&TechnologyRightsDepartmentinOxford,UK:phone:(44)1865843830,fax:(44)1865853333,E-mail:[e-mail]questonlineviatheElsevierhomepage(),byselecting“Support&Contact”then“CopyrightandPermission”andthen“ObtainingPermissions.”Recognizingtheimportanceofpreservingwhathasbeenwritten,Elsevierprintsitsbooksonacid-freepaperwheneverpossible.LibraryofCongressCataloging-in-PublicationData(Applicationsubmitted.)BritishLibraryCataloguing-in-PublicationDataAcataloguerecordforthisbookisavailablefromtheBritishLibrary.ISBN:978-0-7506-8534-4ForinformationonallNewnespublicationsvisitourWebsiteat(AMacmillanCompany),Chennai,India:38:44PM7/19/071:38:44PMForeword..........................................................................................................xiiiPreface..............................................................................................................xivAcknowledgments..............................................................................................xvTermsandAbbreviations...................................................................................xviConventions....................................................................................................xviiiReferences.........................................................................................................xixChapter1–Introduction......................................................................................1WhatIstheARMCortex-M3Processor?............................................................................1BackgroundofARMandARMArchitecture......................................................................3ABriefHistory..............................................................................................................3ArchitectureVersions.....................................................................................................4ProcessorNaming..........................................................................................................6InstructionSetDevelopment................................................................................................8TheThumb-2InstructionSetArchitecture(ISA)................................................................9Cortex-M3ProcessorApplications....................................................................................10OrganizationofThisBook.................................................................................................11FurtherReadings................................................................................................................11Chapter2–OverviewoftheCortex-M3..............................................................13Fundamentals......................................................................................................................13Registers.............................................................................................................................14R0toR12:General-PurposeRegisters........................................................................14R13:StackPointers......................................................................................................14R14:TheLinkRegister................................................................................................15R15:TheProgramCounter..........................................................................................15SpecialRegisters..........................................................................................................15OperationModes................................................................................................................16TheBuilt-InNestedVectoredInterruptController............................................................17NestedInterruptSupport..............................................................................................18VectoredInterruptSupport...........................................................................................18DynamicPriorityChangesSupport.........