FPGA实现高速FFT处理器的设计

:1001-893X(2003)02-0074-05FPGA实现高速FFT处理器的设计*韩颖,王旭,吴嗣亮(,100081):介绍了采用Xilinx公司的Virtex-II系列FPGA设计高速FFT处理器的实现方法及技巧充分利用Virtex-II芯片的硬件资源,减少复杂逻辑,采用流水方式对复数数据实现了加窗FFT求模平方三种运算整个设计采用流水与并行方式尽量避免瓶颈的出现,提高系统时钟频率,达到高速处理实验表明此处理器既有专用ASIC电路的快速性,又有DSP器件的灵活性的特点,适合用于高速数字信号处理:数字信号处理;现场可编程门阵列;快速傅里叶变换;加窗运算;求模平方运算:TN91172:ATheDesignofHigh-speedFFTProcessorsBasedonFPGAHANYing,WANGXu,WUSi-liang(DepartmentofElectronicEngineering,BeijingInstituteofTechnology,Beijing100081,China)Abstract:Theimplementationmethodandskillofadesignforhigh-speedFFTprocessorbasedonXilinxVirtex-IIFPGAisintroducedinthispaper.TousesufficientlyhardwareresourceoftheVirtex-IIFPGAandtoreducethecomplexlogic,theserialmodeisadoptedtoputthecomplexdataintothreeoperationswhichincludemultiplyingwindow,performingFFT,computingmodule-square.Byusingtheserialandparallelarchitectureinthewholedesign,thebottleneckisavoided,thefrequencyofthesystemclockisincreasedandhigh-speedperformanceisachieved.Theexperimentprovesthattheprocessorhasnotonlythehigh-speedperformanceofASICcircuit,butalsotheflexibilityoftheDSPanditissuitableforhigh-speeddigitalsignalprocessing.Keywords:Digitalsingnalprocessing;FPGA;FFT;Multiplyingwindow;Computingmodule-square一引言,FFT,,,FPGA()FFT()FPGA,XilinxVirtex-II,FPGA,Virtex-II4[1]FFT:(1),;(2)420MHz,DCM,;(3),18bit18bit74:2003-01-1720032RESEARCH&DEVELOPMENT;(4)RAM,,,,FPGAFFTRAM,Virtex-IIFPGA3:(1)RAM!∀,;(2),;(3)FPGA,FFT,FFT,,二FFT算法的具体结构,FFT,FFTFFT1.FFT11FFT1!∀,,,512,-2,,2!-2∀,!-2∀2,!-4∀[2],,2.(DIT)-2[3]X(n)=x(n)+x(n+2p-s)Wn2sX(n+2p-s)x(n)-x(n+2p-s)Wn2s(1)s,n=b22s+b1,s=1,2,#,p,b10,1,#,2s-1-1,b20,1,#,2p-s-1FPGA-2FFT,,-2,22,,,2-2[2]2-22,4CLK:x(n+2p-s),x(n),Wn2sR,Wn2sI,Phi1x(n+2p-s),(1)x(n),Phi2,,3.2,3CLKCLK_180180∃,CLKCLK_180,CLKX2,7520032RESEARCH&DEVELOPMENT34.FPGARAMFFT,TMS(Triple-Memory-Space),3RAM:XYZY,X,ZTMS4TMSRAM,,I/O,TMSI/O,FPGA,4RAM,Virtex-IIRAMRAM,,5.RAM,DPRAMRAMFFT,FFT,29565FFT7620032RESEARCH&DEVELOPMENT6count929,1414(count)(data-address)000000000000000000000000001100000000000000000000000001000000010000000011100000001000000000000000010000000001000000000000000000000000000000000011000000011000000010000000001000000000FFTRAMZ,,FFT,Active-HDL7ENB,ENA/WEA76.,FFT%%%,[4],,-218,,1816,,FFT,!∀3:(1)000(111)(,S1);(2)001(110)(1,S2);(3)01x(10x)(2,S3)88,,三系统总体结构FFT9:FPGA!X∀,!∀,5129512,!∀,!X∀,X,,,!∀,!Y∀,,7720032RESEARCH&DEVELOPMENT!∀!FFT∀,FFT,FFT!FFTZ∀,!∀FFT,!∀9四性能分析1.cos(2i51230)+jsin(2i51230),,,,210,!+∀,!o∀10(),2.50MHz,FFTRAM100MHz,(RESET)85s,五结束语,,,,,FPGA[1]XilinxInc.Virtex-II1.5VField-ProgrammableGateArraysdatasheet[S],2002.[2]Liuzhen-yu,Hanyue-qiu.dualbutterflymatchedfilterASICdesign[J].ChineseJournalofElectronics,2001,10(4):563~566.[3].[M].,1997.[4],.FFTCFAR()[D].,1999.[5],.ASIC[M].,2000.:(1977-),,,,;(1974-),,,,,;(1964-),,,,,,4,307820032RESEARCH&DEVELOPMENT