I2C总线协议规范 v2.1

THEI2C-BUSSPECIFICATIONVERSION2.1JANUARY20002PhilipsSemiconductorsTheI2C-busspecificationCONTENTS1PREFACE...........................31.1Version1.0-1992....................31.2Version2.0-198.....................31.3Version2.1-1999....................31.4PurchaseofPhilipsI2C-buscomponents..32THEI2C-BUSBENEFITSDESIGNERSANDMANUFACTURERS...............42.1Designerbenefits....................42.2Manufacturerbenefits.................63INTRODUCTIONTOTHEI2C-BUSSPECIFICATION.....................64THEI2C-BUSCONCEPT...............65GENERALCHARACTERISTICS.........86BITTRANSFER......................86.1Datavalidity........................86.2STARTandSTOPconditions...........97TRANSFERRINGDATA...............107.1Byteformat........................107.2Acknowledge.......................108ARBITRATIONANDCLOCKGENERATION......................118.1Synchronization....................118.2Arbitration.........................128.3Useoftheclocksynchronizingmechanismasahandshake...........139FORMATSWITH7-BITADDRESSES....13107-BITADDRESSING.................1510.1Definitionofbitsinthefirstbyte........1510.1.1Generalcalladdress.................1610.1.2STARTbyte.......................1710.1.3CBUScompatibility..................1811EXTENSIONSTOTHESTANDARD-MODEI2C-BUSSPECIFICATION.......1912FAST-MODE........................1913Hs-MODE..........................2013.1Highspeedtransfer..................2013.2SerialdatatransferformatinHs-mode...2113.3SwitchingfromF/S-toHs-modeandback.............................2313.4Hs-modedevicesatlowerspeedmodes..2413.5Mixedspeedmodesononeserialbussystem............................2413.5.1F/S-modetransferinamixed-speedbussystem............................2513.5.2Hs-modetransferinamixed-speedbussystem............................2513.5.3Timingrequirementsforthebridgeinamixed-speedbussystem..............271410-BITADDRESSING................2714.1Definitionofbitsinthefirsttwobytes.....2714.2Formatswith10-bitaddresses..........2714.3Generalcalladdressandstartbytewith10-bitaddressing....................3015ELECTRICALSPECIFICATIONSANDTIMINGFORI/OSTAGESANDBUSLINES....................3015.1Standard-andFast-modedevices.......3015.2Hs-modedevices....................3416ELECTRICALCONNECTIONSOFI2C-BUSDEVICESTOTHEBUSLINES.3716.1MaximumandminimumvaluesofresistorsRpandRsforStandard-modeI2C-busdevices.....................3917APPLICATIONINFORMATION.........4117.1Slope-controlledoutputstagesofFast-modeI2C-busdevices............4117.2Switchedpull-upcircuitforFast-modeI2C-busdevices.....................4117.3Wiringpatternofthebuslines..........4217.4MaximumandminimumvaluesofresistorsRpandRsforFast-modeI2C-busdevices.....................4217.5MaximumandminimumvaluesofresistorsRpandRsforHs-modeI2C-busdevices.....................4218BI-DIRECTIONALLEVELSHIFTERFORF/S-MODEI2C-BUSSYSTEMS....4218.1Connectingdeviceswithdifferentlogiclevels.........................4318.1.1Operationofthelevelshifter...........4419DEVELOPMENTTOOLSAVAILABLEFROMPHILIPS.....................4520SUPPORTLITERATURE.............463PhilipsSemiconductorsTheI2C-busspecification1PREFACE1.1Version1.0-1992Thisversionofthe1992I2C-busspecificationincludesthefollowingmodifications:•Programmingofaslaveaddressbysoftwarehasbeenomitted.Therealizationofthisfeatureisrathercomplicatedandhasnotbeenused.•The“low-speedmode”hasbeenomitted.Thismodeis,infact,asubsetofthetotalI2C-busspecificationandneednotbespecifiedexplicitly.•TheFast-modeisadded.Thisallowsafourfoldincreaseofthebitrateupto400kbit/s.Fast-modedevicesaredownwardscompatiblei.e.theycanbeusedina0to100kbit/sI2C-bussystem.•10-bitaddressingisadded.Thisallows1024additionalslaveaddresses.•SlopecontrolandinputfilteringforFast-modedevicesisspecifiedtoimprovetheEMCbehaviour.NOTE:Neitherthe100kbit/sI2C-bussystemnorthe100kbit/sdeviceshavebeenchanged.1.2Version2.0-1998TheI2C-bushasbecomeadefactoworldstandardthatisnowimplementedinover1000differentICsandlicensedtomorethan50companies.Manyoftoday’sapplications,however,requirehigherbusspeedsandlowersupplyvoltages.ThisupdatedversionoftheI2C-busspecificationmeetsthoserequirementsandincludesthefollowingmodifications:•TheHigh-speedmode(Hs-mode)isadded.Thisallowsanincreaseinthebitrateupto3.4Mbit/s.Hs-modedevicescanbemixedwithFast-andStandard-modedevicesontheoneI2C-bussystemwithbitratesfrom0to3.4Mbit/s.•Thelowoutputlevelandhysteresisofdeviceswithasupplyvoltageof2Vandbelowhasbeenadaptedtomeettherequirednoisemarginsandtoremaincompatiblewithhighersupplyvoltagedevices.•The0.6Vat6mArequirementfortheoutputstagesofFast-modedeviceshasbeenomitted.•Thefixedinputlevelsfornewdevicesarereplacedbybusvoltage-relatedlevels.•Applicationinformationforbi-directionallevelshifterisadded.1.3Version2.1-2000Version2.1oftheI2C-busspecificationincludesthefollowingminormodifications:•AfterarepeatedSTARTconditioninHs-mode,itispossibletostretchtheclocksignalSCLH(seeSection13.2andFigs22,25and32).•SometimingparametersinHs-modehavebeenrelaxed(seeTables6and7).1.4PurchaseofPhilipsI2C-buscomponentsPurchaseofPhilipsI2Ccomponentsconv