:2006-11:(1983),,,FPGA,,(,100044):,FPGA,:FPGA;;:TP212.14:B:1006-2394(2007)06-0017-02FourfoldFrequencyMultiplicationCircuitDesignofIncrementalOpto2electricEncoderBasedonFPGACHAOJing,WANGXiao2chun,JIANGHong(MechanicalandElectricalControlEngineeringDepartment,BeijingJiaotongUniversity,Beijing100044,China)Abstract:Thisarticleresearchesontheincrementalopto2electricencoderandanalyzeitsfourfoldfrequencymulti2plicationprinciple,itgivesamethodbasedonFPGAtomultiplythesignaloftheincrementalopto2electricencoder,dif2ferentiatesitsphaseandcountsitsnumber,thecontroledobjectpsprecisionofmeasureandcontrolcanbeheightened.Keywords:FPGA;incrementalopto2electricencoder;fourfoldfrequencymultiplication1,,,[2],,,,,FPGA,,2,,,,1AB90,,AB,AB,;BA,Z,(a)(b)1,,,/2AB,,4,/8,4,T,1,T,AB,T,AB,712007645(21),,AB,,2,,3,,,:,,;,,,(),,(a)(b)2(a)(b)(c)33FPGA4::,;,,,FPGALPMlpm_counter4,4DAB,CLK1/4,AOUTBOUT:[AOUT]=(Qn+11ÝQn+14)&[(Qn+11ÝQn+14)Ý(Qn+12ÝQn+13)][BOUT]=(Qn+12ÝQn+13)&[(Qn+11ÝQn+14)Ý(Qn+12ÝQn+13)]:Qn+11=AQn+13=BQn+12=Qn1Qn+14=Qn3,(Qn+11ÝQn+14)Ý(Qn+12ÝQn+13)4,lpm_counter,4ALTERAMax+plus,,5,CLK125ns,AB1000nsAB,AOUT,DA[7..0];,BOUT,DB[7..0]DA[7..0]DB[7..0]81200764.112bit6bit,24.2AT89C52,16MHz,(1/16)12=0.75s,,230,160130(),,4.3,7.62%4(,),,,46bitADPCM5ADPCM(,,,),6,()5ADPCM6ADPCM,6bitADPCM(),ADPCM:[1].[M].:,1996.[2],.MCS-51/96[M].:,2002.[3].C[M].:,1998.[4],.C[M].:,1998.()(18)5,FPGA,,,FPGA1/4,FPGA,FPGA:[1],.[J].,2000,(12).[2],,,.[J].,2005,28(2).[3],,,.FPGA[J].,2006,25(5).[4],.[J].,2000,(1).[5]RovatiL,BonaiutiM,PavanP.Designofahigh-perform2anceopticalsystemforangularpositionmeasurement:opticalandelectronicstrategiesforuncertaintyreduction[J].Instru2mentationandMeasurement,2005,54(5):2075-2081.()1220076