ASE-Material-Technologies-Roadmap-&-Solutions

KennyLo/DirectorR&DDepartmentASEMaterialNov.17,2010ASEMaterialProduct&TechnologyRoadmap1SubstrateProductLine-up&TechnologyAreaSubstrateTechnologyRoadmap/Attributes-FineLineCapability-ViaCapability-SolderResistCapability-SurfaceFinishThinSubstrateSolutionTechnology-StrategyofThinsubstrate-StrategyofEPS/EDSOpenDiscussionTableofContent2•Kaohsiung•ShanghaiKunshan(forfutureexpansion)••LaminateSubstrate中国上海台湾高雄中国昆山日月光集团-材料厂LaminateSubstrate集成電路载板LaminateSubstrate集成電路载板集成電路载板3日月光上海材料厂龍東大道#64ProductLine-up5CriticalTechnologyArea6(Unit:um)4LThick./Core/Prepreg2LThick./CorePatterningProcess130/60240/60/35MSAPFingerPitch85(45/15)110/50210/50/3080(40/15)Sample20102011HVMLVML/SLS30/30LS25/2520122013100/40190/40/3070(35/15)LS20/20SAP80/30(TLP)180/40/30(TLP)EmbeddedTrace–TransferLamination65(30/15)160/30/25(TLP)LS15/15LS10/10EmbeddedTrace-TrenchFilling70/25(TLP)150/25/25(TLP)PTHViaSizeDrill/Land100/20075/175BlindViaSizeDrill/Land80/18065/13575/15060/12075/13060/100Landless60/90ViatypePTH/BVH/BVHCuFilledPTHCuFilled(100umcore/100umφ)PTHCuFilled(100umcore/75umφ)LVMHVMSampleUnderdev.60(30/15)TechnologyRoadmap-17(Unit:um)Sample20102011HVMLVM20122013SRRegistration(Bump)+/-25+/-20SolderResistThicknessSolderResist(Green)DielectricMaterial(Green)Aus32020+/-10E-679FGBS17+/-7Aus308+/-15Aus410(Film)15+/-5E-679GT(LowCTE)+/-10UltraLowCTE(8ppm)10+/-3DirectImageSMPad/SRODiameterFCBumppitch(SMD)150130/80120/80160140110/8080/60Pad(Trace)/SRODiameterFCBumppitch(NSMD)15080/13050/10018013550/9511040/8012040/70LVMHVMSampleUnderdev.125110TechnologyRoadmap-28Sample20102011HVMLVM20122013(Unit:um)SurfaceFinish(FC)SurfaceFinish(WB)E-lyticNi/Au,AFOP,ENAG,SGENIG,OSP,IT&SOPonENIG/OSP/ITE’lessNi/Pd/Au(ENEPIG)ENEPIGPer-SolderPitch(Area)ThickE’lessSnLVMHVMSampleUnderdev.Per-SolderPitch(Peripheral)805040150160140125110ThinSubstrate1LThinSBSMulti-layers20102011Q120122013(Unit:um)EPS/EDSSampleLVMHVMQ2Q3Q4QualificationSampleLVMHVMQualificationSampleLVMQualificationTechnologyRoadmap-39(Unit:um)PatterningProcessMSAPFingerPitch80(40/15)Sample20102011HVMLVML/SLS25/252012201370(35/15)LS20/20SAPEmbeddedTrace–TransferLamination65(30/15)LS15/15LS10/10EmbeddedTrace-TrenchFillingLVMHVMSampleUnderdev.60(30/15)Attribute1:FineLineCapability10DFStripping&AnnealingDFLam./Exposure/DevelopPatterningPlating1stCuPlatingFlashEtchingDrillFineLineCapabilityModifiedSemi-AdditiveProcess(MSAP)FingerPitch80umCapabilityCase:Width40umMin/Space15umMin47.147.144.160.861.658.622.180.626.611FineLineCapabilityDFStripping&AnnealingPatterningPlatingDFLam./Exposure/DevelopCuEtchOutDrillE’lessCuPlatingFlashEtchingSemi-AdditiveProcess(SAP)Trace20/20umCapabilityCase:12CarrierPlatingSeedLayerPatternTransferDFStriping&FlashEtchingPatternPlating&DFStrippingPP+LayerLaminationCarrierRemoveLaserAblationPatternPlatingE’lessCu&PatternTransferL/S14/14um,TCu:20umFineLineCapabilityEmbeddedTrace–TransferLaminationTrace14/14umCapabilityCase:13ItemCurrentProcess(SAP)LaserTrenchStructurePatternFormationbyPhotoLithographybyLaserAblationPatternBuildfromDielectricSurfacePatternBuildfromBeneathDielectricSurfaceProcessFlowComparisonVacuumLaminationVacuumLaminationLaser=ViaFormationLaserAblation(Features-Via)Desmear/E'lessCuDesmear/E'lessCuImageTransfer(Photo-litho)XCuPlating(Pattern)CuPlating(Panel)Stripping/EtchingCuReductionSweetSpot---•FineTracePitchCapability,8/8µm•GoodAlignment-SmallLandorLandless•ProcessStepReduction=NoPhotoLithoProcessesFineLineCapabilityWhat’sLaserTrench?EmbeddedPattern14InnerLayerVacuumLamination•Featuresablation•BlindviaformationDesmear/E’lessCuFeaturesFormation•M.drill-PTH-DES•Laminatedthedielectricmaterial•Desmear:viabottomcleanness&roughendielectricsurface•E’lessCu:makeaconductivelayerfordownstreamCuplatingprocess•FilluptrenchdownareabyCuplating•EtchouttheextraCuondielectricsurfaceCuPlatingCuReductioinFineLineCapabilityProcessFlowofLaserTrench15C4areaDenseTraceareaDenseTrace1starticleof12/12L/SsampleX-sectionphotoofsubstrateTopview:DenseTraceAreaX-section:DenseTraceLayer1LaserTrench:MakingProgressonUltra-fineTracePitch(≦15/15L/S)15/15SamplePassedPackageLevelReliability12/12Sampleready10/10SampleunderdevelopingFineLineCapability16C-SAMInspectionT-SAMInspectionX-sectionofC4areaSubstrateQualityAssemblyQualityFineLineCapabilityLaserTrenchSamplePackageQualityLW/LS15/15um17PhaseTopSideBottomSideBareSubstratePackageDenseTraceC4PadBallPadPackagesize:14x14mmChip:FC5DieSize:6.2x6.2mmBumpPitch:200umLayer:1/2/1BallPitch:0.5mmPadDiameter:375umSRO:275umX-sectionofAssypackagePad&TraceBlindViaSRPatternDielectricInterconnectionDieBumpFineLineCapabilityLaserTrenchSamplePackageQuality181starticleTopview:DenseTraceAreaX-section:DenseTraceLayer1FineLineCapabilityLaserTrenchSampleDeliverableLW/LS12/12um19(Unit:um)Sample20102011HVMLVM20122013PTHViaSizeDrill/Land100/20075/175BlindViaSizeDrill/Land65/13575/15060/12075/13060/100Landless60/90ViatypePTH/BVH/BVHCuFilledPTHCuFilled(100umcore/100umφ)PTHCuFilled(100umcore/75umφ)LVMHVMSampleUnderdev.Attribute2:ViaCapability20ViaCap